[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Trim set_timer_ms() intervals

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Trim set_timer_ms() intervals
URL   : https://patchwork.freedesktop.org/series/77888/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8567 -> Patchwork_17835
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17835/index.html


Changes
-------

  No changes found


Participating hosts (49 -> 44)
------------------------------

  Additional (2): fi-skl-lmem fi-cfl-8109u 
  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7560u fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_8567 -> Patchwork_17835

  CI-20190529: 20190529
  CI_DRM_8567: d36c7a9807541df70739a5917cbbab42fdf66a29 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5690: bea881189520a9cccbb1c1cb454ac5b6fdaea40e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_17835: 183dd61a0a8d0940db360620100f6455738ceffe @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

183dd61a0a8d drm/i915/gt: Always check to enable timeslicing if not submitting
dfd64e60999a drm/i915/gt: Set timeslicing priority from queue
7737d0a8b16f drm/i915: Trim set_timer_ms() intervals

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17835/index.html