[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] drm/i915/gt: Set timeslicing priority from queue

Patchwork patchwork at emeril.freedesktop.org
Fri Jun 5 12:38:47 UTC 2020


== Series Details ==

Series: series starting with [01/10] drm/i915/gt: Set timeslicing priority from queue
URL   : https://patchwork.freedesktop.org/series/78037/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
3a69666621c1 drm/i915/gt: Set timeslicing priority from queue
5e2b5f7efc76 drm/i915/gt: Always check to enable timeslicing if not submitting
2555bb3785f7 Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"
b5285725cfc7 drm/i915/gt: Couple tasklet scheduling for all CS interrupts
4834051a2ae5 drm/i915/gt: Support creation of 'internal' rings
ea2e5e762bd4 drm/i915/gt: Use client timeline address for seqno writes
01def7b10c3d drm/i915/gt: Infrastructure for ring scheduling
-:79: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#79: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 842 lines checked
77d4a18ad122 drm/i915/gt: Enable busy-stats for ring-scheduler
-:13: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#13: 
new file mode 100644

-:200: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst
#200: FILE: drivers/gpu/drm/i915/gt/selftest_engine_pm.c:47:
+		udelay(100);

-:230: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst
#230: FILE: drivers/gpu/drm/i915/gt/selftest_engine_pm.c:77:
+		udelay(100);

total: 0 errors, 1 warnings, 2 checks, 236 lines checked
af2eaeac159b drm/i915/gt: Implement ring scheduler for gen6/7
-:68: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#68: FILE: drivers/gpu/drm/i915/gt/intel_ring_scheduler.c:320:
+				*cs++ = i915_mmio_reg_offset(

-:70: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#70: FILE: drivers/gpu/drm/i915/gt/intel_ring_scheduler.c:322:
+				*cs++ = _MASKED_BIT_ENABLE(

-:105: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#105: FILE: drivers/gpu/drm/i915/gt/intel_ring_scheduler.c:357:
+				*cs++ = _MASKED_BIT_DISABLE(

total: 0 errors, 0 warnings, 3 checks, 506 lines checked
49e963cbf709 drm/i915/gt: Enable ring scheduling for gen6/7



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