[Intel-gfx] [PATCH 01/10] drm/i915/gt: Set timeslicing priority from queue
Mika Kuoppala
mika.kuoppala at linux.intel.com
Fri Jun 5 14:47:24 UTC 2020
Chris Wilson <chris at chris-wilson.co.uk> writes:
> If we only submit the first port, leaving the second empty yet have
> ready requests pending in the queue, use that to set the timeslicing
> priority (i.e. the priority at which we will decided to enabling
s/decided/decide
> timeslicing and evict the currently active context if the queue is of
> equal priority after its quantum expired).
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 33b7173b7195..92c3368ffcbd 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1966,7 +1966,7 @@ static int
> switch_prio(struct intel_engine_cs *engine, const struct i915_request *rq)
> {
> if (list_is_last(&rq->sched.link, &engine->active.requests))
> - return INT_MIN;
> + return engine->execlists.queue_priority_hint;
>
> return rq_prio(list_next_entry(rq, sched.link));
> }
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
More information about the Intel-gfx
mailing list