[Intel-gfx] [PATCH 01/28] drm/i915: Adjust the sentinel assert to match implementation
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Mon Jun 8 07:44:01 UTC 2020
On 07/06/2020 23:20, Chris Wilson wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>
> Sentinels are supposed to be last reqeusts in the elsp queue, not the
> only one, so adjust the assert accordingly.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 14 +++-----------
> 1 file changed, 3 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index d55a5e0466e5..db8a170b0e5c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1635,9 +1635,9 @@ assert_pending_valid(const struct intel_engine_execlists *execlists,
> ccid = ce->lrc.ccid;
>
> /*
> - * Sentinels are supposed to be lonely so they flush the
> - * current exection off the HW. Check that they are the
> - * only request in the pending submission.
> + * Sentinels are supposed to be the last request so they flush
> + * the current exection off the HW. Check that they are the only
> + * request in the pending submission.
> */
> if (sentinel) {
> GEM_TRACE_ERR("%s: context:%llx after sentinel in pending[%zd]\n",
> @@ -1646,15 +1646,7 @@ assert_pending_valid(const struct intel_engine_execlists *execlists,
> port - execlists->pending);
> return false;
> }
> -
> sentinel = i915_request_has_sentinel(rq);
FWIW I was changing it to "sentinel |= ..." so it keeps working if we
decide to use more than 2 elsp ports on Icelake one day.
Regards,
Tvrtko
> - if (sentinel && port != execlists->pending) {
> - GEM_TRACE_ERR("%s: sentinel context:%llx not in prime position[%zd]\n",
> - engine->name,
> - ce->timeline->fence_context,
> - port - execlists->pending);
> - return false;
> - }
>
> /* Hold tightly onto the lock to prevent concurrent retires! */
> if (!spin_trylock_irqsave(&rq->lock, flags))
>
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