[Intel-gfx] [PATCH] drm/i915/icl: Disable DIP on MST ports with the transcoder clock still on
Imre Deak
imre.deak at intel.com
Wed Jun 10 19:56:20 UTC 2020
On Wed, Jun 10, 2020 at 10:45:35PM +0300, Shankar, Uma wrote:
>
>
> > -----Original Message-----
> > From: Deak, Imre <imre.deak at intel.com>
> > Sent: Wednesday, June 10, 2020 3:36 AM
> > To: intel-gfx at lists.freedesktop.org
> > Cc: Mun, Gwan-gyeong <gwan-gyeong.mun at intel.com>; Shankar, Uma
> > <uma.shankar at intel.com>
> > Subject: [PATCH] drm/i915/icl: Disable DIP on MST ports with the transcoder
> > clock still on
> >
> > According to BSpec the Data Island Packet should be disabled after disabling the
> > transcoder, but before the transcoder clock select is set to none. On an ICL RVP,
> > daisy-chained MST config not following this leads to a hang with the following
> > MCE when disabling the output:
> >
> > [ 870.948739] mce: [Hardware Error]: CPU 0: Machine Check Exception: 5 Bank 6:
> > ba00000011000402 [ 871.019212] mce: [Hardware Error]: RIP !INEXACT!
> > 10:<ffffffff81aca652> {poll_idle+0x92/0xb0} [ 871.019212] mce: [Hardware Error]:
> > TSC 135a261fe61 [ 871.019212] mce: [Hardware Error]: PROCESSOR 0:706e5 TIME
> > 1591739604 SOCKET 0 APIC 0 microcode 20 [ 871.019212] mce: [Hardware Error]:
> > Run the above through 'mcelog --ascii'
> > [ 871.019212] mce: [Hardware Error]: Machine check: Processor context corrupt [
> > 871.019212] Kernel panic - not syncing: Fatal machine check [ 871.019212] Kernel
> > Offset: disabled
> >
> > Bspec: 4287
> >
> > Fixes: fa37a213275c ("drm/i915: Stop sending DP SDPs on ddi disable")
> > Cc: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> > Cc: Uma Shankar <uma.shankar at intel.com>
> > Signed-off-by: Imre Deak <imre.deak at intel.com>
>
>
> This is a good catch Imre. Would be good to know how you suspected this.
The MCE happens just when accessing a register without the required
clock for it being on. In this case when reading/writing the SDP
registers. We had to fix the same problem in the past around HDMI
infoframe programming.
> Reviewed-by: Uma Shankar <uma.shankar at intel.com>
>
> > drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++-
> > drivers/gpu/drm/i915/display/intel_dp_mst.c | 8 ++++++++
> > 2 files changed, 11 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 96eaa4b39c68..50ccc6e30dc1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -3510,7 +3510,9 @@ static void intel_ddi_post_disable_dp(struct
> > intel_atomic_state *state,
> > INTEL_OUTPUT_DP_MST);
> > enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
> >
> > - intel_dp_set_infoframes(encoder, false, old_crtc_state, old_conn_state);
> > + if (!is_mst)
> > + intel_dp_set_infoframes(encoder, false,
> > + old_crtc_state, old_conn_state);
> >
> > /*
> > * Power down sink before disabling the port, otherwise we end diff --git
> > a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index d18b406f2a7d..f29e51ce489c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -397,6 +397,14 @@ static void intel_mst_post_disable_dp(struct
> > intel_atomic_state *state,
> > */
> > drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector-
> > >port,
> > false);
> > +
> > + /*
> > + * BSpec 4287: disable DIP after the transcoder is disabled and before
> > + * the transcoder clock select is set to none.
> > + */
> > + if (last_mst_stream)
> > + intel_dp_set_infoframes(&intel_dig_port->base, false,
> > + old_crtc_state, NULL);
> > /*
> > * From TGL spec: "If multi-stream slave transcoder: Configure
> > * Transcoder Clock Select to direct no clock to the transcoder"
> > --
> > 2.23.1
>
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