[Intel-gfx] [drm-intel:for-linux-next-fixes 4/16] drivers/gpu/drm/i915/gt/selftest_lrc.c:1333:34: error: too few arguments to function call, expected 2, have 1
kernel test robot
lkp at intel.com
Mon Jun 15 22:27:20 UTC 2020
tree: git://anongit.freedesktop.org/drm-intel for-linux-next-fixes
head: add78d27d388520cbed6a7bf01d1e0afa183314d
commit: 04dc41776145f539ab6da442cb633e45539bed9a [4/16] drm/i915/gt: Prevent timeslicing into unpreemptable requests
config: x86_64-allyesconfig (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 3d8149c2a1228609fd7d7c91a04681304a2f0ca9)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
git checkout 04dc41776145f539ab6da442cb633e45539bed9a
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>
All errors (new ones prefixed by >>, old ones prefixed by <<):
In file included from drivers/gpu/drm/i915/gt/intel_lrc.c:5953:
>> drivers/gpu/drm/i915/gt/selftest_lrc.c:1333:34: error: too few arguments to function call, expected 2, have 1
engine_heartbeat_disable(engine);
~~~~~~~~~~~~~~~~~~~~~~~~ ^
drivers/gpu/drm/i915/gt/selftest_lrc.c:54:13: note: 'engine_heartbeat_disable' declared here
static void engine_heartbeat_disable(struct intel_engine_cs *engine,
^
drivers/gpu/drm/i915/gt/selftest_lrc.c:1402:33: error: too few arguments to function call, expected 2, have 1
engine_heartbeat_enable(engine);
~~~~~~~~~~~~~~~~~~~~~~~ ^
drivers/gpu/drm/i915/gt/selftest_lrc.c:64:13: note: 'engine_heartbeat_enable' declared here
static void engine_heartbeat_enable(struct intel_engine_cs *engine,
^
2 errors generated.
vim +1333 drivers/gpu/drm/i915/gt/selftest_lrc.c
1300
1301 static int live_timeslice_nopreempt(void *arg)
1302 {
1303 struct intel_gt *gt = arg;
1304 struct intel_engine_cs *engine;
1305 enum intel_engine_id id;
1306 struct igt_spinner spin;
1307 int err = 0;
1308
1309 /*
1310 * We should not timeslice into a request that is marked with
1311 * I915_REQUEST_NOPREEMPT.
1312 */
1313 if (!IS_ACTIVE(CONFIG_DRM_I915_TIMESLICE_DURATION))
1314 return 0;
1315
1316 if (igt_spinner_init(&spin, gt))
1317 return -ENOMEM;
1318
1319 for_each_engine(engine, gt, id) {
1320 struct intel_context *ce;
1321 struct i915_request *rq;
1322 unsigned long timeslice;
1323
1324 if (!intel_engine_has_preemption(engine))
1325 continue;
1326
1327 ce = intel_context_create(engine);
1328 if (IS_ERR(ce)) {
1329 err = PTR_ERR(ce);
1330 break;
1331 }
1332
> 1333 engine_heartbeat_disable(engine);
1334 timeslice = xchg(&engine->props.timeslice_duration_ms, 1);
1335
1336 /* Create an unpreemptible spinner */
1337
1338 rq = igt_spinner_create_request(&spin, ce, MI_ARB_CHECK);
1339 intel_context_put(ce);
1340 if (IS_ERR(rq)) {
1341 err = PTR_ERR(rq);
1342 goto out_heartbeat;
1343 }
1344
1345 i915_request_get(rq);
1346 i915_request_add(rq);
1347
1348 if (!igt_wait_for_spinner(&spin, rq)) {
1349 i915_request_put(rq);
1350 err = -ETIME;
1351 goto out_spin;
1352 }
1353
1354 set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags);
1355 i915_request_put(rq);
1356
1357 /* Followed by a maximum priority barrier (heartbeat) */
1358
1359 ce = intel_context_create(engine);
1360 if (IS_ERR(ce)) {
1361 err = PTR_ERR(rq);
1362 goto out_spin;
1363 }
1364
1365 rq = intel_context_create_request(ce);
1366 intel_context_put(ce);
1367 if (IS_ERR(rq)) {
1368 err = PTR_ERR(rq);
1369 goto out_spin;
1370 }
1371
1372 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
1373 i915_request_get(rq);
1374 i915_request_add(rq);
1375
1376 /*
1377 * Wait until the barrier is in ELSP, and we know timeslicing
1378 * will have been activated.
1379 */
1380 if (wait_for_submit(engine, rq, HZ / 2)) {
1381 i915_request_put(rq);
1382 err = -ETIME;
1383 goto out_spin;
1384 }
1385
1386 /*
1387 * Since the ELSP[0] request is unpreemptible, it should not
1388 * allow the maximum priority barrier through. Wait long
1389 * enough to see if it is timesliced in by mistake.
1390 */
1391 if (i915_request_wait(rq, 0, timeslice_threshold(engine)) >= 0) {
1392 pr_err("%s: I915_PRIORITY_BARRIER request completed, bypassing no-preempt request\n",
1393 engine->name);
1394 err = -EINVAL;
1395 }
1396 i915_request_put(rq);
1397
1398 out_spin:
1399 igt_spinner_end(&spin);
1400 out_heartbeat:
1401 xchg(&engine->props.timeslice_duration_ms, timeslice);
1402 engine_heartbeat_enable(engine);
1403 if (err)
1404 break;
1405
1406 if (igt_flush_test(gt->i915)) {
1407 err = -EIO;
1408 break;
1409 }
1410 }
1411
1412 igt_spinner_fini(&spin);
1413 return err;
1414 }
1415
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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