[Intel-gfx] [PATCH] drm/i915/gvt: query if vgpu is active via GETPARAM IOCTL
kernel test robot
lkp at intel.com
Tue Jun 16 16:34:06 UTC 2020
Hi Shaofeng,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip linus/master v5.8-rc1 next-20200616]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Shaofeng-Tang/drm-i915-gvt-query-if-vgpu-is-active-via-GETPARAM-IOCTL/20200616-162408
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-debian-10.3 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-13) 9.3.0
reproduce (this is a W=1 build):
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>
All errors (new ones prefixed by >>, old ones prefixed by <<):
drivers/gpu/drm/i915/i915_getparam.c: In function 'i915_getparam_ioctl':
>> drivers/gpu/drm/i915/i915_getparam.c:165:11: error: implicit declaration of function 'intel_vgpu_active'; did you mean 'intel_vtd_active'? [-Werror=implicit-function-declaration]
165 | value = intel_vgpu_active(i915);
| ^~~~~~~~~~~~~~~~~
| intel_vtd_active
cc1: some warnings being treated as errors
vim +165 drivers/gpu/drm/i915/i915_getparam.c
10
11 int i915_getparam_ioctl(struct drm_device *dev, void *data,
12 struct drm_file *file_priv)
13 {
14 struct drm_i915_private *i915 = to_i915(dev);
15 const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
16 drm_i915_getparam_t *param = data;
17 int value;
18
19 switch (param->param) {
20 case I915_PARAM_IRQ_ACTIVE:
21 case I915_PARAM_ALLOW_BATCHBUFFER:
22 case I915_PARAM_LAST_DISPATCH:
23 case I915_PARAM_HAS_EXEC_CONSTANTS:
24 /* Reject all old ums/dri params. */
25 return -ENODEV;
26 case I915_PARAM_CHIPSET_ID:
27 value = i915->drm.pdev->device;
28 break;
29 case I915_PARAM_REVISION:
30 value = i915->drm.pdev->revision;
31 break;
32 case I915_PARAM_NUM_FENCES_AVAIL:
33 value = i915->ggtt.num_fences;
34 break;
35 case I915_PARAM_HAS_OVERLAY:
36 value = !!i915->overlay;
37 break;
38 case I915_PARAM_HAS_BSD:
39 value = !!intel_engine_lookup_user(i915,
40 I915_ENGINE_CLASS_VIDEO, 0);
41 break;
42 case I915_PARAM_HAS_BLT:
43 value = !!intel_engine_lookup_user(i915,
44 I915_ENGINE_CLASS_COPY, 0);
45 break;
46 case I915_PARAM_HAS_VEBOX:
47 value = !!intel_engine_lookup_user(i915,
48 I915_ENGINE_CLASS_VIDEO_ENHANCE, 0);
49 break;
50 case I915_PARAM_HAS_BSD2:
51 value = !!intel_engine_lookup_user(i915,
52 I915_ENGINE_CLASS_VIDEO, 1);
53 break;
54 case I915_PARAM_HAS_LLC:
55 value = HAS_LLC(i915);
56 break;
57 case I915_PARAM_HAS_WT:
58 value = HAS_WT(i915);
59 break;
60 case I915_PARAM_HAS_ALIASING_PPGTT:
61 value = INTEL_PPGTT(i915);
62 break;
63 case I915_PARAM_HAS_SEMAPHORES:
64 value = !!(i915->caps.scheduler & I915_SCHEDULER_CAP_SEMAPHORES);
65 break;
66 case I915_PARAM_HAS_SECURE_BATCHES:
67 value = HAS_SECURE_BATCHES(i915) && capable(CAP_SYS_ADMIN);
68 break;
69 case I915_PARAM_CMD_PARSER_VERSION:
70 value = i915_cmd_parser_get_version(i915);
71 break;
72 case I915_PARAM_SUBSLICE_TOTAL:
73 value = intel_sseu_subslice_total(sseu);
74 if (!value)
75 return -ENODEV;
76 break;
77 case I915_PARAM_EU_TOTAL:
78 value = sseu->eu_total;
79 if (!value)
80 return -ENODEV;
81 break;
82 case I915_PARAM_HAS_GPU_RESET:
83 value = i915_modparams.enable_hangcheck &&
84 intel_has_gpu_reset(&i915->gt);
85 if (value && intel_has_reset_engine(&i915->gt))
86 value = 2;
87 break;
88 case I915_PARAM_HAS_RESOURCE_STREAMER:
89 value = 0;
90 break;
91 case I915_PARAM_HAS_POOLED_EU:
92 value = HAS_POOLED_EU(i915);
93 break;
94 case I915_PARAM_MIN_EU_IN_POOL:
95 value = sseu->min_eu_in_pool;
96 break;
97 case I915_PARAM_HUC_STATUS:
98 value = intel_huc_check_status(&i915->gt.uc.huc);
99 if (value < 0)
100 return value;
101 break;
102 case I915_PARAM_MMAP_GTT_VERSION:
103 /* Though we've started our numbering from 1, and so class all
104 * earlier versions as 0, in effect their value is undefined as
105 * the ioctl will report EINVAL for the unknown param!
106 */
107 value = i915_gem_mmap_gtt_version();
108 break;
109 case I915_PARAM_HAS_SCHEDULER:
110 value = i915->caps.scheduler;
111 break;
112
113 case I915_PARAM_MMAP_VERSION:
114 /* Remember to bump this if the version changes! */
115 case I915_PARAM_HAS_GEM:
116 case I915_PARAM_HAS_PAGEFLIPPING:
117 case I915_PARAM_HAS_EXECBUF2: /* depends on GEM */
118 case I915_PARAM_HAS_RELAXED_FENCING:
119 case I915_PARAM_HAS_COHERENT_RINGS:
120 case I915_PARAM_HAS_RELAXED_DELTA:
121 case I915_PARAM_HAS_GEN7_SOL_RESET:
122 case I915_PARAM_HAS_WAIT_TIMEOUT:
123 case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
124 case I915_PARAM_HAS_PINNED_BATCHES:
125 case I915_PARAM_HAS_EXEC_NO_RELOC:
126 case I915_PARAM_HAS_EXEC_HANDLE_LUT:
127 case I915_PARAM_HAS_COHERENT_PHYS_GTT:
128 case I915_PARAM_HAS_EXEC_SOFTPIN:
129 case I915_PARAM_HAS_EXEC_ASYNC:
130 case I915_PARAM_HAS_EXEC_FENCE:
131 case I915_PARAM_HAS_EXEC_CAPTURE:
132 case I915_PARAM_HAS_EXEC_BATCH_FIRST:
133 case I915_PARAM_HAS_EXEC_FENCE_ARRAY:
134 case I915_PARAM_HAS_EXEC_SUBMIT_FENCE:
135 /* For the time being all of these are always true;
136 * if some supported hardware does not have one of these
137 * features this value needs to be provided from
138 * INTEL_INFO(), a feature macro, or similar.
139 */
140 value = 1;
141 break;
142 case I915_PARAM_HAS_CONTEXT_ISOLATION:
143 value = intel_engines_has_context_isolation(i915);
144 break;
145 case I915_PARAM_SLICE_MASK:
146 value = sseu->slice_mask;
147 if (!value)
148 return -ENODEV;
149 break;
150 case I915_PARAM_SUBSLICE_MASK:
151 value = sseu->subslice_mask[0];
152 if (!value)
153 return -ENODEV;
154 break;
155 case I915_PARAM_CS_TIMESTAMP_FREQUENCY:
156 value = RUNTIME_INFO(i915)->cs_timestamp_frequency_hz;
157 break;
158 case I915_PARAM_MMAP_GTT_COHERENT:
159 value = INTEL_INFO(i915)->has_coherent_ggtt;
160 break;
161 case I915_PARAM_PERF_REVISION:
162 value = i915_perf_ioctl_version();
163 break;
164 case I915_PARAM_IS_GVT:
> 165 value = intel_vgpu_active(i915);
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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