[Intel-gfx] [PATCH 1/6] drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders

[Imre Deak]

On Tue, Jun 16, 2020 at 08:02:10PM +0300, Souza, Jose wrote:
> On Tue, 2020-06-16 at 19:42 +0300, Imre Deak wrote:
> > On Tue, Jun 16, 2020 at 07:32:46PM +0300, Souza, Jose wrote:
> > > On Tue, 2020-06-16 at 17:18 +0300, Imre Deak wrote:
> > > > MST encoders must use the master MST transcoder's DP_TP_STATUS and
> > > > DP_TP_CONTROL registers. Atm, during the HW readout of a slave
> > > > transcoder's CRTC state we reset these register addresses in
> > > > intel_dp::regs.dp_tp_* to the slave transcoder's DP_TP_* register
> > > > addresses incorrectly; fix this.
> > > > 
> > > > This issue led at least to
> > > > 'Timed out waiting for ACT sent when disabling'
> > > > errors during output disabling in a multiple MST stream config.
> > > 
> > > Can you point to place where dp_tp_ctl is used and cause this?  All
> > > the MST code paths uses the dp_tp_ctl of the main intel_dp(the one
> > > that is not a mst connector).
> > 
> > During a slave stream disabling when waiting for the ACT sent flag for
> > that stream.
> > 
> > > > This change replaces
> > > > https://patchwork.freedesktop.org/patch/369577/?series=78193&rev=1
> > > > which just papered over the problem.
> > > > 
> > > > Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > > > Cc: José Roberto de Souza <jose.souza at intel.com>
> > > > Signed-off-by: Imre Deak <imre.deak at intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_ddi.c | 15 ++++++++++-----
> > > >  1 file changed, 10 insertions(+), 5 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > index ca7bb2294d2b..73d6cc29291a 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > > @@ -4193,11 +4193,6 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
> > > >  	if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
> > > >  		return;
> > > >  
> > > > -	if (INTEL_GEN(dev_priv) >= 12) {
> > > > -		intel_dp->regs.dp_tp_ctl = TGL_DP_TP_CTL(cpu_transcoder);
> > > > -		intel_dp->regs.dp_tp_status = TGL_DP_TP_STATUS(cpu_transcoder);
> > > > -	}
> > > > -
> > > >  	intel_dsc_get_config(encoder, pipe_config);
> > > >  
> > > >  	temp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > > > @@ -4299,6 +4294,16 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
> > > >  		break;
> > > >  	}
> > > >  
> > > > +	if (INTEL_GEN(dev_priv) >= 12) {
> > > > +		enum transcoder transcoder =
> > > > +			intel_dp_mst_is_slave_trans(pipe_config) ?
> > > > +			pipe_config->mst_master_transcoder :
> > > > +			pipe_config->cpu_transcoder;
> > > > +
> > > > +		intel_dp->regs.dp_tp_ctl = TGL_DP_TP_CTL(transcoder);
> > > > +		intel_dp->regs.dp_tp_status = TGL_DP_TP_STATUS(transcoder);
> > > > +	}
> > > 
> > > Also not sure how change only in the config readout would fix the issue, 
> > 
> > After a modeset we'll verify the HW state. The readout for a slave
> > stream CRTC (get_pipe_config) running after the master CRTC's readout
> > will overwrite the dp_tp reg addresses. The other instance of dp_tp
> > register address init (in tgl_ddi_pre_enable_dp()) is correct.
> 
> intel_mst_post_disable_dp()
> 	struct intel_digital_port *intel_dig_port = intel_mst->primary;
> 	struct intel_dp *intel_dp = &intel_dig_port->dp;
> 	
> ...
> 	
> 	if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
> 				  DP_TP_STATUS_ACT_SENT, 1))
> 		drm_err(&dev_priv->drm, "Timed out waiting for ACT sent when disabling\n");
> 
> 
> Until here is right, but yeah bellow is the problem:
> 
> static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
> 					struct intel_crtc_state *pipe_config)
> {
> 	struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> 	struct intel_digital_port *intel_dig_port = intel_mst->primary;
> 
> 	intel_ddi_get_config(&intel_dig_port->base, pipe_config);
> }
> 
>
> It will be overwritten with the transcoder of the last crtc read.Would
> suggest to add something about intel_dp_mst_enc_get_config() to the
> commit description but the change looks good now.

Hm yea, it's the encoder not the CRTC readout where the overwrite
happens. Will update this in the commit log. 

> > > IFWI don't enable MST so when i915 takes over a full modeset will
> > > happen to enable MST and only dp_tp_ctl of the main intel_dp(the one
> > > that is not a mst connector) will be set, check
> > > tgl_ddi_pre_enable_dp().
> > > 
> > > > +
> > > >  	pipe_config->has_audio =
> > > >  		intel_ddi_is_audio_enabled(dev_priv, cpu_transcoder);
> > > >