[Intel-gfx] [PATCH 2/7] drm/i915: Use the gt in HAS_ENGINE

[Daniele Ceraolo Spurio]

On 6/26/20 7:35 AM, Chris Wilson wrote:
> Quoting Daniele Ceraolo Spurio (2020-06-26 00:42:07)
>> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
>> index 26cae4846c82..ddefc52f6e09 100644
>> --- a/drivers/gpu/drm/i915/gvt/handlers.c
>> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
>> @@ -1867,7 +1867,7 @@ static int csfe_chicken1_mmio_write(struct intel_vgpu *vgpu,
>>          MMIO_F(prefix(BLT_RING_BASE), s, f, am, rm, d, r, w); \
>>          MMIO_F(prefix(GEN6_BSD_RING_BASE), s, f, am, rm, d, r, w); \
>>          MMIO_F(prefix(VEBOX_RING_BASE), s, f, am, rm, d, r, w); \
>> -       if (HAS_ENGINE(dev_priv, VCS1)) \
>> +       if (HAS_ENGINE(&dev_priv->gt, VCS1)) \
> 
> Implicit param! It can switch to gvt->gt for all callsites, killing the
> dev_priv locals.

I've switched this to gvt->gt, but unfortunately the locals will have to 
stay because some of the display register definitions still use dev_priv 
implicitly to access the display mmio base and the 
pipe_offsets/trans_offsets arrays.

Daniele

> -Chris
>