[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/5] drm/i915: Add plane damage clips property

Patchwork patchwork at emeril.freedesktop.org
Sat Jun 27 08:42:06 UTC 2020


== Series Details ==

Series: series starting with [v2,1/5] drm/i915: Add plane damage clips property
URL   : https://patchwork.freedesktop.org/series/78830/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
93646a5debb4 drm/i915: Add plane damage clips property
876e57df337b drm/i915: Reorder intel_psr2_config_valid()
220cc1343ce6 drm/i915: Add PSR2 selective fetch registers
-:37: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#37: FILE: drivers/gpu/drm/i915/i915_reg.h:4593:
+#define  PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val)	REG_FIELD_PREP(PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)

-:39: WARNING:LONG_LINE: line length of 125 exceeds 100 columns
#39: FILE: drivers/gpu/drm/i915/i915_reg.h:4595:
+#define  PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR(val)		REG_FIELD_PREP(PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK, val)

-:71: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#71: FILE: drivers/gpu/drm/i915/i915_reg.h:7182:
+#define _SEL_FETCH_PLANE_BASE_1(pipe) _PIPE(pipe, _SEL_FETCH_PLANE_BASE_1_A, _SEL_FETCH_PLANE_BASE_1_B)

total: 0 errors, 3 warnings, 0 checks, 87 lines checked
0a361499f045 drm/i915: Initial implementation of PSR2 selective fetch
-:283: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#283: FILE: drivers/gpu/drm/i915/i915_params.c:106:
+i915_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
+	"Enable PSR2 selective fetch "

total: 0 errors, 0 warnings, 1 checks, 220 lines checked
db04305684b4 drm/i915/display: Implement WA 1408330847



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