[Intel-gfx] [PATCH 39/59] drm/kmb: Fixed driver unload
Anitha Chrisanthus
anitha.chrisanthus at intel.com
Tue Jun 30 21:27:51 UTC 2020
unmap MSSCAM registers
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus at intel.com>
---
drivers/gpu/drm/kmb/kmb_drv.c | 15 +++------------
drivers/gpu/drm/kmb/kmb_drv.h | 1 -
drivers/gpu/drm/kmb/kmb_regs.h | 2 +-
3 files changed, 4 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/kmb/kmb_drv.c b/drivers/gpu/drm/kmb/kmb_drv.c
index b5c8711..e9dd879 100644
--- a/drivers/gpu/drm/kmb/kmb_drv.c
+++ b/drivers/gpu/drm/kmb/kmb_drv.c
@@ -179,17 +179,6 @@ static int kmb_load(struct drm_device *drm, unsigned long flags)
iounmap(dev_p->mipi_mmio);
return -ENOMEM;
}
-/*testing*/
- if (!request_mem_region(CPR_BASE_ADDR, 100, "cpr")) {
- DRM_ERROR("failed to reserve %s registers\n", "cpr");
- return -ENOMEM;
- }
- dev_p->cpr_mmio = ioremap_cache(CPR_BASE_ADDR, 0x100);
- if (!dev_p->cpr_mmio) {
- DRM_ERROR("failed to ioremap %s registers\n", "CPR");
- release_mem_region(CPR_BASE_ADDR, 100);
- return -ENOMEM;
- }
if (IS_ERR(dev_p->msscam_mmio)) {
DRM_ERROR("failed to map MSSCAM registers\n");
@@ -509,8 +498,10 @@ static void kmb_drm_unload(struct device *dev)
release_mem_region(MIPI_BASE_ADDR, MIPI_MMIO_SIZE);
}
- if (dev_p->msscam_mmio)
+ if (dev_p->msscam_mmio) {
iounmap(dev_p->msscam_mmio);
+ release_mem_region(MSS_CAM_BASE_ADDR, MSS_CAM_MMIO_SIZE);
+ }
of_reserved_mem_device_release(drm->dev);
drm_mode_config_cleanup(drm);
diff --git a/drivers/gpu/drm/kmb/kmb_drv.h b/drivers/gpu/drm/kmb/kmb_drv.h
index 58bb967..da1df5c 100644
--- a/drivers/gpu/drm/kmb/kmb_drv.h
+++ b/drivers/gpu/drm/kmb/kmb_drv.h
@@ -40,7 +40,6 @@ struct kmb_drm_private {
void __iomem *lcd_mmio;
void __iomem *mipi_mmio;
void __iomem *msscam_mmio;
- void __iomem *cpr_mmio;
unsigned char n_layers;
struct clk *clk;
struct drm_crtc crtc;
diff --git a/drivers/gpu/drm/kmb/kmb_regs.h b/drivers/gpu/drm/kmb/kmb_regs.h
index eb84320..255c44d 100644
--- a/drivers/gpu/drm/kmb/kmb_regs.h
+++ b/drivers/gpu/drm/kmb/kmb_regs.h
@@ -36,7 +36,7 @@
#define MSS_CAM_BASE_ADDR (MIPI_BASE_ADDR + 0x10000)
#define LCD_MMIO_SIZE (0x3000)
#define MIPI_MMIO_SIZE (0x4000)
-#define MSS_CAM_MMIO_SIZE (0x10)
+#define MSS_CAM_MMIO_SIZE (0x30)
/***************************************************************************
* LCD controller control register defines
--
2.7.4
More information about the Intel-gfx
mailing list