[Intel-gfx] [PATCH 1/3] drm/i915: Assert requests within a context are submitted in order

[Mika Kuoppala]

Chris Wilson <chris at chris-wilson.co.uk> writes:

> Check the flow of requests into the hardware to verify that are
> submitted in order along their timeline.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_lrc.c | 4 ++++
>  drivers/gpu/drm/i915/i915_request.c | 4 ++++
>  2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 16a023ac4604..13941d1c0a4a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1622,6 +1622,7 @@ static bool can_merge_rq(const struct i915_request *prev,
>  	if (!can_merge_ctx(prev->context, next->context))
>  		return false;
>  
> +	GEM_BUG_ON(i915_seqno_passed(prev->fence.seqno, next->fence.seqno));
>  	return true;
>  }
>  
> @@ -2142,6 +2143,9 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
>  				GEM_BUG_ON(last &&
>  					   !can_merge_ctx(last->context,
>  							  rq->context));
> +				GEM_BUG_ON(last &&
> +					   i915_seqno_passed(last->fence.seqno,
> +							     rq->fence.seqno));
>  
>  				submit = true;
>  				last = rq;
> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
> index ca5361eb1f0b..35147df79655 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -737,6 +737,7 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp)
>  	RCU_INIT_POINTER(rq->timeline, tl);
>  	RCU_INIT_POINTER(rq->hwsp_cacheline, tl->hwsp_cacheline);
>  	rq->hwsp_seqno = tl->hwsp_seqno;
> +	GEM_BUG_ON(i915_request_completed(rq));
>  
>  	rq->rcustate = get_state_synchronize_rcu(); /* acts as smp_mb() */
>  
> @@ -1284,6 +1285,9 @@ __i915_request_add_to_timeline(struct i915_request *rq)
>  	prev = to_request(__i915_active_fence_set(&timeline->last_request,
>  						  &rq->fence));
>  	if (prev && !i915_request_completed(prev)) {
> +		GEM_BUG_ON(i915_seqno_passed(prev->fence.seqno,
> +					     rq->fence.seqno));
> +
>  		if (is_power_of_2(prev->engine->mask | rq->engine->mask))
>  			i915_sw_fence_await_sw_fence(&rq->submit,
>  						     &prev->submit,
> -- 
> 2.25.1
>
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