[Intel-gfx] [PATCH] drm/i915/tgl: WaEnablePreemptionGranularityControlByUMD

Ye, Tony tony.ye at intel.com
Wed Mar 11 15:11:02 UTC 2020



On 3/10/2020 5:19 PM, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> 
> Certain workloads need the ability to disable preemption completely so
> allow them to do that by whitelisting GEN8_CS_CHICKEN1.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Cc: Michal Mrozek <michal.mrozek at intel.com>
> Cc: Tony Ye <tony.ye at intel.com>
> Cc: Rafael Antognolli <rafael.antognolli at intel.com>
> Cc: Jason Ekstrand <jason at jlekstrand.net>
> ---
> We need confirmation and acks from all three userspace components here.
> Especially since my impression was some are for and some were against
> whitelisting this one.

Media doesn't need this for TGL. But it's acceptable if other userspace 
wants to whitelist it.

Acked-by: Tony Ye <tony.ye at intel.com>

> ---
>   drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 391f39b1fb26..37becdf77427 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1276,6 +1276,9 @@ static void tgl_whitelist_build(struct intel_engine_cs *engine)
>   
>   		/* Wa_1806527549:tgl */
>   		whitelist_reg(w, HIZ_CHICKEN);
> +
> +		/* WaEnablePreemptionGranularityControlByUMD:tgl */
> +		whitelist_reg(w, GEN8_CS_CHICKEN1);
>   		break;
>   	default:
>   		break;
> 


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