[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/15] drm/i915: Move GGTT fence registers under gt/

Patchwork patchwork at emeril.freedesktop.org
Mon Mar 16 20:34:47 UTC 2020


== Series Details ==

Series: series starting with [01/15] drm/i915: Move GGTT fence registers under gt/
URL   : https://patchwork.freedesktop.org/series/74740/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2bf8a0072a07 drm/i915: Move GGTT fence registers under gt/
-:47: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#47: 
rename from drivers/gpu/drm/i915/i915_gem_fence_reg.c

total: 0 errors, 1 warnings, 0 checks, 205 lines checked
eb984adc50b0 drm/i915/gt: Pull restoration of GGTT fences underneath the GT
ec7d53e3657f drm/i915: Remove manual save/resume of fence register state
11c6a912a6f4 drm/i915/gt: Allocate i915_fence_reg array
fb9609af3e59 drm/i915/gt: Only wait for GPU activity before unbinding a GGTT fence
047943aa26dd drm/i915/gt: Store the fence details on the fence
68777e6d26ac drm/i915/gt: Make fence revocation unequivocal
ca73a0e0d45c drm/i915/gem: Drop cached obj->bind_count
-:159: WARNING:LONG_LINE: line over 100 characters
#159: FILE: drivers/gpu/drm/i915/i915_debugfs.c:286:
+		seq_printf(m, "%s: %lu objects, %llu bytes (%llu active, %llu inactive, %llu closed)\n", \

total: 0 errors, 1 warnings, 0 checks, 228 lines checked
6e568cc647bc drm/i915: Immediately execute the fenced work
0e046d2c468f drm/i915/gem: Assign context id for async work
16a27ae3ea5b drm/i915: Export a preallocate variant of i915_active_acquire()
c447dbfb9f9e drm/i915/gem: Split eb_vma into its own allocation
10bf1fdc1a47 drm/i915/gem: Separate the ww_mutex walker into its own list
-:92: WARNING:LONG_LINE: line over 100 characters
#92: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1568:
+			list_for_each_entry_safe_continue_reverse(unlock, en, &eb->lock, lock_link) {

-:140: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pos' - possible side-effects?
#140: FILE: drivers/gpu/drm/i915/i915_utils.h:269:
+#define list_for_each_entry_safe_continue_reverse(pos, n, head, member)	\
+	for (pos = list_prev_entry(pos, member),			\
+		n = list_prev_entry(pos, member);			\
+	     &pos->member != (head);					\
+	     pos = n, n = list_prev_entry(n, member))

-:140: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'n' - possible side-effects?
#140: FILE: drivers/gpu/drm/i915/i915_utils.h:269:
+#define list_for_each_entry_safe_continue_reverse(pos, n, head, member)	\
+	for (pos = list_prev_entry(pos, member),			\
+		n = list_prev_entry(pos, member);			\
+	     &pos->member != (head);					\
+	     pos = n, n = list_prev_entry(n, member))

-:140: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'member' - possible side-effects?
#140: FILE: drivers/gpu/drm/i915/i915_utils.h:269:
+#define list_for_each_entry_safe_continue_reverse(pos, n, head, member)	\
+	for (pos = list_prev_entry(pos, member),			\
+		n = list_prev_entry(pos, member);			\
+	     &pos->member != (head);					\
+	     pos = n, n = list_prev_entry(n, member))

total: 0 errors, 1 warnings, 3 checks, 120 lines checked
dbdbd5f98bb5 drm/i915/gem: Asynchronous GTT unbinding
671fabf9545b drm/i915/gem: Bind the fence async for execbuf



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