[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/6] drm/i915/tc/tgl: Implement TCCOLD sequences

[Souza, Jose]

On Tue, 2020-03-24 at 20:28 +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [v3,1/6] drm/i915/tc/tgl: Implement
> TCCOLD sequences
> URL   : https://patchwork.freedesktop.org/series/75034/
> State : warning
> 
> == Summary ==
> 
> $ dim checkpatch origin/drm-tip
> 125d3dc52b2a drm/i915/tc/tgl: Implement TCCOLD sequences
> ca5b103fb97c drm/i915/display: Add
> intel_display_power_get_without_ack()
> bb6945d8d8cf drm/i915/display: Implement
> intel_display_power_wait_enable_ack()
> 4b5d60dcb2a5 drm/i915/display: Add intel_aux_ch_to_power_domain()
> 3b031f0ded4f drm/i915/tc/icl: Implement the TC cold exit sequence
> -:161: WARNING:MSLEEP: msleep < 20ms can sleep for up to 20ms; see
> Documentation/timers/timers-howto.rst
> #161: FILE: drivers/gpu/drm/i915/display/intel_tc.c:549:
> +			msleep(1);

Left as is on purpose a x86 is usually configured as tickless and even
when not it supports HZ=1000 that matches 1ms.

> 
> total: 0 errors, 1 warnings, 0 checks, 166 lines checked
> ae9ffbf9a4cc drm/i915/dp: Get TC link reference during DP detection
>