[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for SAGV support for Gen12+ (rev3)

[Patchwork]

== Series Details ==

Series: SAGV support for Gen12+ (rev3)
URL   : https://patchwork.freedesktop.org/series/75129/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
ad8810ff373a drm/i915: Start passing latency as parameter
930754956920 drm/i915: Eliminate magic numbers "0" and "1" from color plane
-:118: WARNING:LONG_LINE: line over 100 characters
#118: FILE: drivers/gpu/drm/i915/intel_pm.c:4541:
+			rate = skl_plane_relative_data_rate(crtc_state, plane_state, COLOR_PLANE_UV);

total: 0 errors, 1 warnings, 0 checks, 163 lines checked
b76321aa6824 drm/i915: Introduce skl_plane_wm_level accessor.
9cd6396bdbd9 drm/i915: Add intel_atomic_get_bw_*_state helpers
345239c1e284 drm/i915: Extract gen specific functions from intel_can_enable_sagv
37f392cf14b8 drm/i915: Add proper SAGV support for TGL+
-:234: WARNING:BRACES: braces {} are not necessary for single statement blocks
#234: FILE: drivers/gpu/drm/i915/display/intel_display.c:15662:
+		if (bw_state && state->modeset && intel_can_enable_sagv(bw_state)) {
+			intel_enable_sagv(dev_priv);
+		}

-:341: WARNING:BRACES: braces {} are not necessary for any arm of this statement
#341: FILE: drivers/gpu/drm/i915/intel_pm.c:3874:
+		if (INTEL_GEN(dev_priv) >= 12) {
[...]
+		} else if (INTEL_GEN(dev_priv) >= 11) {
[...]
+		} else {
[...]

total: 0 errors, 2 warnings, 0 checks, 480 lines checked
5ac95b3960a7 drm/i915: Added required new PCode commands
7ddef9fc5a42 drm/i915: Rename bw_state to new_bw_state
9ab9d139acd7 drm/i915: Restrict qgv points which don't have enough bandwidth.
17b1ab4ef65f drm/i915: Enable SAGV support for Gen12