[Intel-gfx] [PATCH] drm/i915/gt: Fill all the unused space in the GGTT

Matthew Auld matthew.william.auld at gmail.com
Tue Mar 31 15:07:21 UTC 2020


On Tue, 31 Mar 2020 at 13:42, Chris Wilson <chris at chris-wilson.co.uk> wrote:
>
> When we allocate space in the GGTT we may have to allocate a larger
> region than will be populated by the object to accommodate fencing. Make
> sure that this space beyond the end of the buffer points safely into
> scratch space, in case the HW tries to access it anyway (e.g. fenced
> access to the last tile row).
>
> Reported-by: Imre Deak <imre.deak at intel.com>
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/1554
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld at intel.com>
> Cc: Imre Deak <imre.deak at intel.com>
> Cc: stable at vger.kernel.org

Do we not need similar treatment for gen6? It seems to also play
tricks with the nop clear range, or did we disable gen7 ppgtt in the
end?

Reviewed-by: Matthew Auld <matthew.auld at intel.com>


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