[Intel-gfx] [PATCH 01/12] drm/i915/fbc: Require linear fb stride to be multiple of 512 bytes on gen9/glk
Matt Roper
matthew.d.roper at intel.com
Fri May 1 01:03:10 UTC 2020
On Wed, Apr 29, 2020 at 01:10:23PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Display WA #1105 says that FBC requires PLANE_STRIDE to be a multiple
> of 512 bytes on gen9 and glk.
>
> This is definitely true for glk as certain tests (such as
> igt/kms_big_fb/linear-16bpp-rotate-0) are now failing when the
> display resolution results in a plane stride which is not a
> multiple of 512 bytes.
>
> Curiously I was not able to reproduce this on a KBL. First I
> suspected that our use of the FBC override stride explain this,
> but after trying to use the override stride on glk the test
> still failed. I did try both the old CHICKEN_MISC_4 way and
> the new FBC_CHICKEN way, neither had any effect on the result.
>
> Anyways, we need this at least on glk. But let's trust the spec
> and apply the w/a for all gen9 as well, despite being unable to
> reproduce the problem.
>
> Cc: José Roberto de Souza <jose.souza at intel.com>
> Fixes: 691f7ba58d52 ("drm/i915/display/fbc: Make fences a nice-to-have for GEN9+")
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index c6afa10e814c..7194f9bc62c5 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -564,7 +564,7 @@ void intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv)
> }
>
> static bool stride_is_valid(struct drm_i915_private *dev_priv,
> - unsigned int stride)
> + u64 modifier, unsigned int stride)
> {
> /* This should have been caught earlier. */
> if (drm_WARN_ON_ONCE(&dev_priv->drm, (stride & (64 - 1)) != 0))
> @@ -580,6 +580,11 @@ static bool stride_is_valid(struct drm_i915_private *dev_priv,
> if (IS_GEN(dev_priv, 4) && !IS_G4X(dev_priv) && stride < 2048)
> return false;
>
> + /* Display WA #1105: skl,bxt,kbl,cfl,glk */
> + if (IS_GEN(dev_priv, 9) &&
> + modifier == DRM_FORMAT_MOD_LINEAR && stride & 511)
Might be slightly more readable to use !IS_ALIGNED(stride, 512), but
either way,
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
> + return false;
> +
> if (stride > 16384)
> return false;
>
> @@ -810,7 +815,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
> return false;
> }
>
> - if (!stride_is_valid(dev_priv, cache->fb.stride)) {
> + if (!stride_is_valid(dev_priv, cache->fb.modifier, cache->fb.stride)) {
> fbc->no_fbc_reason = "framebuffer stride not supported";
> return false;
> }
> --
> 2.24.1
>
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--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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