[Intel-gfx] [PATCH 1/9] Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"

[Chris Wilson]

Quoting Mika Kuoppala (2020-04-30 16:47:27)
> This reverts commit 62037ffff229b7d94f1db5ef8d2e2ec819832ef3.
> 
> L3 ro cache invalidation is part of the dword0 of pipe
> control.

True.

> Also it is not relevant to this gen.

?

> Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris