[Intel-gfx] [PATCH 01/22] drm/i915: Allow some leniency in PCU reads

[Mika Kuoppala]

Chris Wilson <chris at chris-wilson.co.uk> writes:

> Extend the timeout for pcode reads to 10ms as they should not be

s/10ms/20ms

> performed along critical paths, and succeeding after a short delay is
> better than failing entirely.
>
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/1800
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_sideband.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
> index 14daf6af6854..d5129c1dd452 100644
> --- a/drivers/gpu/drm/i915/intel_sideband.c
> +++ b/drivers/gpu/drm/i915/intel_sideband.c
> @@ -429,7 +429,7 @@ int sandybridge_pcode_read(struct drm_i915_private *i915, u32 mbox,
>  
>  	mutex_lock(&i915->sb_lock);
>  	err = __sandybridge_pcode_rw(i915, mbox, val, val1,
> -				     500, 0,
> +				     500, 20,
>  				     true);
>  	mutex_unlock(&i915->sb_lock);
>  
> -- 
> 2.20.1
>
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