[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Rocket Lake (rev5)

[Patchwork]

== Series Details ==

Series: Introduce Rocket Lake (rev5)
URL   : https://patchwork.freedesktop.org/series/76826/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
992fe0e5bf6f drm/i915/rkl: Add RKL platform info and PCI ids
-:35: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'p' - possible side-effects?
#35: FILE: drivers/gpu/drm/i915/i915_drv.h:1522:
+#define IS_RKL_REVID(p, since, until) \
+	(IS_ROCKETLAKE(p) && IS_REVID(p, since, until))

-:102: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#102: FILE: include/drm/i915_pciids.h:609:
+#define INTEL_RKL_IDS(info) \
+	INTEL_VGA_DEVICE(0x4C80, info), \
+	INTEL_VGA_DEVICE(0x4C8A, info), \
+	INTEL_VGA_DEVICE(0x4C8B, info), \
+	INTEL_VGA_DEVICE(0x4C8C, info), \
+	INTEL_VGA_DEVICE(0x4C90, info), \
+	INTEL_VGA_DEVICE(0x4C9A, info)

-:102: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'info' - possible side-effects?
#102: FILE: include/drm/i915_pciids.h:609:
+#define INTEL_RKL_IDS(info) \
+	INTEL_VGA_DEVICE(0x4C80, info), \
+	INTEL_VGA_DEVICE(0x4C8A, info), \
+	INTEL_VGA_DEVICE(0x4C8B, info), \
+	INTEL_VGA_DEVICE(0x4C8C, info), \
+	INTEL_VGA_DEVICE(0x4C90, info), \
+	INTEL_VGA_DEVICE(0x4C9A, info)

total: 1 errors, 0 warnings, 2 checks, 69 lines checked
15e40d80e929 x86/gpu: add RKL stolen memory support
294ed2fa7047 drm/i915/rkl: Re-use TGL GuC/HuC firmware
5077d28b310e drm/i915/rkl: Load DMC firmware for Rocket Lake
a828a46df1e1 drm/i915/rkl: Add PCH support
79d1afd4876a drm/i915/rkl: Update memory bandwidth parameters
baec83a0ef12 drm/i915/rkl: Limit number of universal planes to 5
d2f8442de5ae drm/i915/rkl: Add power well support
58ad52c714dd drm/i915/rkl: Program BW_BUDDY0 registers instead of BW_BUDDY1/2
-:36: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#36: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:5261:
+		min_buddy = max_buddy = 0;

total: 0 errors, 0 warnings, 1 checks, 84 lines checked
c601db6a20fd drm/i915/rkl: RKL only uses PHY_MISC for PHY's A and B
cbc732494a17 drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
ffcedfb908db drm/i915/rkl: Check proper SDEISR bits for TC1 and TC2 outputs
aa69de72e7ad drm/i915/rkl: Setup ports/phys
c3f23b36db92 drm/i915/rkl: provide port/phy mapping for vbt
-:17: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#17: 
[drm:intel_dp_init_connector [i915]] Adding DP connector on [ENCODER:275:DDI A]

total: 0 errors, 1 warnings, 0 checks, 104 lines checked
06afd0a313fb drm/i915/rkl: Add DDC pin mapping
907417b5599f drm/i915/rkl: Don't try to access transcoder D
01eeaee24e99 drm/i915/rkl: Don't try to read out DSI transcoders
f53b5ed86243 drm/i915/rkl: Handle comp master/slave relationships for PHYs
0728f1c7d53c drm/i915/rkl: Add DPLL4 support
a31143c0e350 drm/i915/rkl: Handle HTI
-:92: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#92: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:274:
+{
+

-:154: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#154: FILE: drivers/gpu/drm/i915/i915_reg.h:2903:
+#define   HDPORT_PHY_USED_DP(phy)	REG_BIT(2*phy + 2)
                                  	         ^

-:154: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'phy' may be better as '(phy)' to avoid precedence issues
#154: FILE: drivers/gpu/drm/i915/i915_reg.h:2903:
+#define   HDPORT_PHY_USED_DP(phy)	REG_BIT(2*phy + 2)

-:155: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#155: FILE: drivers/gpu/drm/i915/i915_reg.h:2904:
+#define   HDPORT_PHY_USED_HDMI(phy)	REG_BIT(2*phy + 1)
                                    	         ^

-:155: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'phy' may be better as '(phy)' to avoid precedence issues
#155: FILE: drivers/gpu/drm/i915/i915_reg.h:2904:
+#define   HDPORT_PHY_USED_HDMI(phy)	REG_BIT(2*phy + 1)

total: 0 errors, 0 warnings, 5 checks, 116 lines checked
b71b6be89206 drm/i915/rkl: Disable PSR2
a956d64b8996 drm/i915/rkl: Add initial workarounds