[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Consider DBuf bandwidth when calculating CDCLK (rev11)

[Patchwork]

== Series Details ==

Series: Consider DBuf bandwidth when calculating CDCLK (rev11)
URL   : https://patchwork.freedesktop.org/series/74739/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
d3cd77d67aae drm/i915: Decouple cdclk calculation from modeset checks
65be6d7302db drm/i915: Extract cdclk requirements checking to separate function
997e17ed6b40 drm/i915: Check plane configuration properly
-:31: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Stanislav Lisovskiy <stanislav.lisovskiY at intel.com>'

total: 0 errors, 1 warnings, 0 checks, 14 lines checked
15c1c44d9cdc drm/i915: Plane configuration affects CDCLK in Gen11+
-:22: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Stanislav Lisovskiy <stanislav.lisovskiY at intel.com>'

total: 0 errors, 1 warnings, 0 checks, 8 lines checked
719f67e64ea2 drm/i915: Introduce for_each_dbuf_slice_in_mask macro
-:24: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__slice' - possible side-effects?
#24: FILE: drivers/gpu/drm/i915/display/intel_display.h:190:
+#define for_each_dbuf_slice_in_mask(__slice, __mask) \
+	for ((__slice) = DBUF_S1; (__slice) < I915_MAX_DBUF_SLICES; (__slice)++) \
+		for_each_if((BIT(__slice)) & (__mask))

total: 0 errors, 0 warnings, 1 checks, 20 lines checked
b18cdabf9809 drm/i915: Adjust CDCLK accordingly to our DBuf bw needs
-:146: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#146: FILE: drivers/gpu/drm/i915/display/intel_bw.c:480:
+	if (new_bw_state && old_bw_state) {
+

-:151: WARNING:LINE_SPACING: Missing a blank line after declarations
#151: FILE: drivers/gpu/drm/i915/display/intel_bw.c:485:
+			int ret = intel_atomic_lock_global_state(&new_bw_state->base);
+			if (ret)

total: 0 errors, 1 warnings, 1 checks, 290 lines checked
39b38984e111 drm/i915: Remove unneeded hack now for CDCLK