[Intel-gfx] [PATCH v8 0/7] Consider DBuf bandwidth when calculating CDCLK

[Stanislav Lisovskiy]

We need to calculate cdclk after watermarks/ddb has been calculated
as with recent hw CDCLK needs to be adjusted accordingly to DBuf
requirements, which is not possible with current code organization.

Setting CDCLK according to DBuf BW requirements and not just rejecting
if it doesn't satisfy BW requirements, will allow us to save power when
it is possible and gain additional bandwidth when it's needed - i.e
boosting both our power management and perfomance capabilities.

Stanislav Lisovskiy (7):
  drm/i915: Decouple cdclk calculation from modeset checks
  drm/i915: Extract cdclk requirements checking to separate function
  drm/i915: Check plane configuration properly
  drm/i915: Plane configuration affects CDCLK in Gen11+
  drm/i915: Introduce for_each_dbuf_slice_in_mask macro
  drm/i915: Adjust CDCLK accordingly to our DBuf bw needs
  drm/i915: Remove unneeded hack now for CDCLK

 drivers/gpu/drm/i915/display/intel_bw.c       | 114 +++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_bw.h       |   9 ++
 drivers/gpu/drm/i915/display/intel_cdclk.c    |  30 +++--
 drivers/gpu/drm/i915/display/intel_cdclk.h    |   1 -
 drivers/gpu/drm/i915/display/intel_display.c  |  88 +++++++++++---
 drivers/gpu/drm/i915/display/intel_display.h  |   7 ++
 .../drm/i915/display/intel_display_power.h    |   1 +
 drivers/gpu/drm/i915/intel_pm.c               |  31 ++++-
 drivers/gpu/drm/i915/intel_pm.h               |   3 +
 9 files changed, 244 insertions(+), 40 deletions(-)

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2.24.1.485.gad05a3d8e5