[Intel-gfx] [CI v2] drm/i915/hdcp: Update CP as per the kernel internal state

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces at lists.freedesktop.org> On Behalf Of
> Anshuman Gupta
> Sent: Monday, March 30, 2020 9:43 PM
> To: intel-gfx at lists.freedesktop.org
> Subject: [Intel-gfx] [CI v2] drm/i915/hdcp: Update CP as per the kernel internal
> state
> 
> Content Protection property should be updated as per the kernel internal state.
> Let's say if Content protection is disabled by userspace, CP property should be
> set to UNDESIRED so that reauthentication will not happen until userspace
> request it again, but when kernel disables the HDCP due to any DDI disabling
> sequences like modeset/DPMS operation, kernel should set the property to
> DESIRED, so that when opportunity arises, kernel will start the HDCP
> authentication on its own.
> 
> Somewhere in the line, state machine to set content protection to DESIRED from
> kernel was broken and IGT coverage was missing for it.
> This patch fixes it.
> 
> v2:
> - Fixing hdcp CP state in intel_hdcp_atomic_check(), that will
>   require to check hdcp->value in intel_hdcp_update_pipe() in order
>   to avoid enabling hdcp, if it was already enabled.

This looks a fair compromise to handle the existing state machine.
Reviewed-by: Uma Shankar <uma.shankar at intel.com>

> Cc: Ramalingam C <ramalingam.c at intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_hdcp.c | 27 +++++++++++++++++++----
>  1 file changed, 23 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index cd3b686980b2..9b3870ba1a4d 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -2087,6 +2087,7 @@ void intel_hdcp_update_pipe(struct intel_encoder
> *encoder,
>  		(conn_state->hdcp_content_type != hdcp->content_type &&
>  		 conn_state->content_protection !=
>  		 DRM_MODE_CONTENT_PROTECTION_UNDESIRED);
> +	bool desired_and_not_enabled = false;
> 
>  	/*
>  	 * During the HDCP encryption session if Type change is requested, @@ -
> 2109,8 +2110,15 @@ void intel_hdcp_update_pipe(struct intel_encoder
> *encoder,
>  	}
> 
>  	if (conn_state->content_protection ==
> -	    DRM_MODE_CONTENT_PROTECTION_DESIRED ||
> -	    content_protection_type_changed)
> +	    DRM_MODE_CONTENT_PROTECTION_DESIRED) {
> +		mutex_lock(&hdcp->mutex);
> +		/* Avoid enabling hdcp, if it already ENABLED */
> +		desired_and_not_enabled =
> +			hdcp->value !=
> DRM_MODE_CONTENT_PROTECTION_ENABLED;
> +		mutex_unlock(&hdcp->mutex);
> +	}
> +
> +	if (desired_and_not_enabled || content_protection_type_changed)
>  		intel_hdcp_enable(connector,
>  				  crtc_state->cpu_transcoder,
>  				  (u8)conn_state->hdcp_content_type);
> @@ -2159,6 +2167,19 @@ void intel_hdcp_atomic_check(struct drm_connector
> *connector,
>  		return;
>  	}
> 
> +	crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
> +						   new_state->crtc);
> +	/*
> +	 * Fix the HDCP uapi content protection state in case of modeset.
> +	 * FIXME: As per HDCP content protection property uapi doc, an uevent()
> +	 * need to be sent if there is transition from ENABLED->DESIRED.
> +	 */
> +	if (drm_atomic_crtc_needs_modeset(crtc_state) &&
> +	    (old_cp == DRM_MODE_CONTENT_PROTECTION_ENABLED &&
> +	    new_cp != DRM_MODE_CONTENT_PROTECTION_UNDESIRED))
> +		new_state->content_protection =
> +			DRM_MODE_CONTENT_PROTECTION_DESIRED;
> +
>  	/*
>  	 * Nothing to do if the state didn't change, or HDCP was activated since
>  	 * the last commit. And also no change in hdcp content type.
> @@ -2171,8 +2192,6 @@ void intel_hdcp_atomic_check(struct drm_connector
> *connector,
>  			return;
>  	}
> 
> -	crtc_state = drm_atomic_get_new_crtc_state(new_state->state,
> -						   new_state->crtc);
>  	crtc_state->mode_changed = true;
>  }
> 
> --
> 2.26.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx