[Intel-gfx] [PATCH v8 3/7] drm/i915: Check plane configuration properly

[Manasi Navare]

On Thu, May 14, 2020 at 06:21:41PM +0300, Stanislav Lisovskiy wrote:
> From: Stanislav Lisovskiy <stanislav.lisovskiY at intel.com>
> 
> Checking with hweight8 if plane configuration had
> changed seems to be wrong as different plane configs
> can result in a same hamming weight.
> So lets check the bitmask itself.
> 
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare at intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index e93a553a344d..a9ab66d97360 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14614,7 +14614,13 @@ static int intel_atomic_check_planes(struct intel_atomic_state *state)
>  		old_active_planes = old_crtc_state->active_planes & ~BIT(PLANE_CURSOR);
>  		new_active_planes = new_crtc_state->active_planes & ~BIT(PLANE_CURSOR);
>  
> -		if (hweight8(old_active_planes) == hweight8(new_active_planes))
> +		/*
> +		 * Not only the number of planes, but if the plane configuration had
> +		 * changed might already mean we need to recompute min CDCLK,
> +		 * because different planes might consume different amount of Dbuf bandwidth
> +		 * according to formula: Bw per plane = Pixel rate * bpp * pipe/plane scale factor
> +		 */
> +		if (old_active_planes == new_active_planes)
>  			continue;
>  
>  		ret = intel_crtc_add_planes_to_state(state, crtc, new_active_planes);
> -- 
> 2.24.1.485.gad05a3d8e5
> 
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