[Intel-gfx] [PATCH v9 0/7] Consider DBuf bandwidth when calculating CDCLK
Stanislav Lisovskiy
stanislav.lisovskiy at intel.com
Tue May 19 13:11:10 UTC 2020
We need to calculate cdclk after watermarks/ddb has been calculated
as with recent hw CDCLK needs to be adjusted accordingly to DBuf
requirements, which is not possible with current code organization.
Setting CDCLK according to DBuf BW requirements and not just rejecting
if it doesn't satisfy BW requirements, will allow us to save power when
it is possible and gain additional bandwidth when it's needed - i.e
boosting both our power management and perfomance capabilities.
This patch is preparation for that, first we now extract modeset
calculation from modeset checks, in order to call it after wm/ddb
has been calculated.
Stanislav Lisovskiy (7):
drm/i915: Decouple cdclk calculation from modeset checks
drm/i915: Extract cdclk requirements checking to separate function
drm/i915: Check plane configuration properly
drm/i915: Plane configuration affects CDCLK in Gen11+
drm/i915: Introduce for_each_dbuf_slice_in_mask macro
drm/i915: Adjust CDCLK accordingly to our DBuf bw needs
drm/i915: Remove unneeded hack now for CDCLK
drivers/gpu/drm/i915/display/intel_bw.c | 118 +++++++++++++++++-
drivers/gpu/drm/i915/display/intel_bw.h | 10 ++
drivers/gpu/drm/i915/display/intel_cdclk.c | 40 +++---
drivers/gpu/drm/i915/display/intel_cdclk.h | 1 -
drivers/gpu/drm/i915/display/intel_display.c | 89 ++++++++++---
drivers/gpu/drm/i915/display/intel_display.h | 7 ++
.../drm/i915/display/intel_display_power.h | 1 +
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 31 ++++-
drivers/gpu/drm/i915/intel_pm.h | 3 +
10 files changed, 261 insertions(+), 40 deletions(-)
--
2.24.1.485.gad05a3d8e5
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