[Intel-gfx] [PATCH v9 0/7] Consider DBuf bandwidth when calculating CDCLK

Chris Wilson chris at chris-wilson.co.uk
Thu May 21 22:17:25 UTC 2020

Quoting Manasi Navare (2020-05-21 22:28:42)
> Pushed the series to dinq, thank you for patches and reviews

Could you tidy up the mess of the merge? Things like

--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -6,11 +6,12 @@
 #include <drm/drm_atomic_state_helper.h>

 #include "intel_bw.h"
+#include "intel_pm.h"
 #include "intel_display_types.h"
 #include "intel_sideband.h"
 #include "intel_atomic.h"
 #include "intel_pm.h"
+#include "intel_cdclk.h"

The out of place intel_atomic.h and intel_pm.h were added in

The code is a mess, checkpatch would be mad.

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