[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/11] drm/i915/gt: Start timeslice on partial submission

Patchwork patchwork at emeril.freedesktop.org
Thu May 28 23:02:58 UTC 2020

== Series Details ==

Series: series starting with [01/11] drm/i915/gt: Start timeslice on partial submission
URL   : https://patchwork.freedesktop.org/series/77762/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8549 -> Patchwork_17809



  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17809/index.html

New tests

  New tests have been introduced between CI_DRM_8549 and Patchwork_17809:

### New IGT tests (1) ###

  * igt at dmabuf@all at dma_fence_proxy:
    - Statuses : 41 pass(s)
    - Exec time: [0.03, 0.10] s



  No changes found

Participating hosts (50 -> 43)

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 

Build changes

  * Linux: CI_DRM_8549 -> Patchwork_17809

  CI-20190529: 20190529
  CI_DRM_8549: e50e9c6bf4efd00b02d91ff470993bbd0db94f67 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5682: e5371a99a877be134c6ad5361a5f03843a66f775 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_17809: 70c78cfa6ea58dde569696417b5e00d7ad6b7151 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

70c78cfa6ea5 drm/i915/gem: Make relocations atomic within execbuf
372342371047 drm/i915: Unpeel awaits on a proxy fence
eba65e7de8ae dma-buf: Proxy fence, an unsignaled fence placeholder
71c20a444d9e drm/i915/gem: Add all GPU reloc awaits/signals en masse
c2d55803a60c drm/i915/gem: Build the reloc request first
10ad05422c96 drm/i915/gem: Lift GPU relocation allocation
fb12696a43ec drm/i915/gem: Separate reloc validation into an earlier step
283e921c4b08 drm/i915: Add list_for_each_entry_safe_continue_reverse
7c0380bdfab2 drm/i915/gem: Async GPU relocations only
af3a1406b2d8 drm/i915/gem: Mark the buffer pool as active for the cmdparser
dc44da7a88e6 drm/i915/gt: Start timeslice on partial submission

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17809/index.html

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