[Intel-gfx] [PATCH] drm/i915/tgl, rkl, dg1: Apply WA_1406941453 to TGL, RKL and DG1

[Clint Taylor]

On 11/2/20 5:59 PM, Swathi Dhanavanthri wrote:
> This workaround is applicable only for tgl,rkl and dg1.
>
> Bspec: 52890, 53273, 53508.
>
> Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri at intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +++++-------
>   1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index fed9503a7c4e..45c082070bd9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1768,6 +1768,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>   		 */
>   		wa_write_or(wal, GEN7_FF_THREAD_MODE,
>   			    GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
> +
> +		/* Wa_1406941453:tgl,rkl,dg1 */
> +		wa_masked_en(wal,
> +			     GEN10_SAMPLER_MODE,
> +			     ENABLE_SMALLPL);
>   	}
>   
>   	if (IS_DG1_REVID(i915, DG1_REVID_A0, DG1_REVID_A0) ||
> @@ -1806,13 +1811,6 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
>   			     FF_DOP_CLOCK_GATE_DISABLE);
>   	}
>   
> -	if (IS_GEN(i915, 12)) {
> -		/* Wa_1406941453:gen12 */
> -		wa_masked_en(wal,
> -			     GEN10_SAMPLER_MODE,
> -			     ENABLE_SMALLPL);
> -	}
> -
>   	if (IS_GEN(i915, 11)) {
>   		/* This is not an Wa. Enable for better image quality */
>   		wa_masked_en(wal,

Reviewed-by: Clint Taylor <Clinton.A.Taylor at intel.com>

-Clint