[Intel-gfx] [PATCH 01/11] drm/i915: Add REG_FIELD_PREP to VRR register def

[Jani Nikula]

On Thu, 22 Oct 2020, Manasi Navare <manasi.d.navare at intel.com> wrote:
> VRR_CTL register onloy had a GENMASK but no field prep
> define for TRANS_VRR_CTL_LINE_COUNT field so add that

For the subject, I think mentioning VRR_CTL_LINK_COUNT is more important
than REG_FIELD_PREP.

Reviewed-by: Jani Nikula <jani.nikula at intel.com>

>
> Cc: Aditya Swarup <aditya.swarup at intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index d4952c9875fb..9792c931b4c5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4348,6 +4348,7 @@ enum {
>  #define   VRR_CTL_IGN_MAX_SHIFT		REG_BIT(30)
>  #define   VRR_CTL_FLIP_LINE_EN		REG_BIT(29)
>  #define   VRR_CTL_LINE_COUNT_MASK	REG_GENMASK(10, 3)
> +#define   VRR_CTL_LINE_COUNT(x)		REG_FIELD_PREP(VRR_CTL_LINE_COUNT_MASK, (x))
>  #define   VRR_CTL_SW_FULLLINE_COUNT	REG_BIT(0)
>  
>  #define _TRANS_VRR_VMAX_A		0x60424

-- 
Jani Nikula, Intel Open Source Graphics Center