[Intel-gfx] [RFC 2/2] drm/i915/display: Protect pipe_update against dc3co exit

[Imre Deak]

On Mon, Nov 30, 2020 at 02:46:46PM +0530, Anshuman Gupta wrote:
> At usual case DC3CO exit happen automatically by DMC f/w whenever
> PSR2 clears idle. This happens smoothly by DMC f/w to work with flips.
> But there are certain scenario where DC3CO  Disallowed by driver
> asynchronous with flips. In such scenario display engine could
> be already in DC3CO state and driver has disallowed it,
> It initiates DC3CO exit sequence in DMC f/w which requires a
> dc3co exit delay of 200us in driver.
> It requires to protect intel_pipe_update_{update_end} with
> dc3co exit delay.
> 
> Cc: Imre Deak <imre.deak at intel.com>
> Cc: <stable at vger.kernel.org>
> Signed-off-by: Anshuman Gupta <anshuman.gupta at intel.com>

To make sure that it doesn't hide the root cause (or affects unrelated
platforms), I'd only add locking around DC3co changes with a new lock,
using lock/unlock helpers in intel_display_power.c called from
intel_pipe_update_start/end.

Also please submit this patch separately, w/o the optimization in patch
1/2, so we know that this change fixes the problem.

--Imre

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ba26545392bc..3b81b98c0daf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15924,6 +15924,8 @@ static void intel_update_crtc(struct intel_atomic_state *state,
>  	else
>  		intel_fbc_enable(state, crtc);
>  
> +	/* Protect intel_pipe_update_{start,end} with power_domians lock */
> +	mutex_lock(&dev_priv->power_domains.lock);
>  	/* Perform vblank evasion around commit operation */
>  	intel_pipe_update_start(new_crtc_state);
>  
> @@ -15935,6 +15937,7 @@ static void intel_update_crtc(struct intel_atomic_state *state,
>  		i9xx_update_planes_on_crtc(state, crtc);
>  
>  	intel_pipe_update_end(new_crtc_state);
> +	mutex_unlock(&dev_prive->power_domains.lock);
>  
>  	/*
>  	 * We usually enable FIFO underrun interrupts as part of the
> -- 
> 2.26.2
>