[Intel-gfx] [PATCH 10/20] drm/i915: s/port/hpd_pin/ for icp+ ddi hpd bits
Lucas De Marchi
lucas.demarchi at intel.com
Wed Oct 7 23:22:44 UTC 2020
On Tue, Oct 06, 2020 at 05:33:39PM +0300, Ville Syrjälä wrote:
>From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
>Use hpd_pin instead of port in the parametrized ICP+ DDI HPD
>macros. Makes it clear what these refer to.
>
>Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>---
> drivers/gpu/drm/i915/i915_irq.c | 12 ++++++------
> drivers/gpu/drm/i915/i915_reg.h | 34 ++++++++++++++++-----------------
> 2 files changed, 23 insertions(+), 23 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index 6b824db1424a..b64f83f3d686 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -141,9 +141,9 @@ static const u32 hpd_gen11[HPD_NUM_PINS] = {
> };
>
> static const u32 hpd_icp[HPD_NUM_PINS] = {
>- [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PORT_A),
>- [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PORT_B),
>- [HPD_PORT_C] = SDE_DDI_HOTPLUG_ICP(PORT_C),
>+ [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(HPD_PORT_A),
>+ [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(HPD_PORT_B),
>+ [HPD_PORT_C] = SDE_DDI_HOTPLUG_ICP(HPD_PORT_C),
> [HPD_PORT_TC1] = SDE_TC_HOTPLUG_ICP(TC_PORT_TC1),
> [HPD_PORT_TC2] = SDE_TC_HOTPLUG_ICP(TC_PORT_TC2),
> [HPD_PORT_TC3] = SDE_TC_HOTPLUG_ICP(TC_PORT_TC3),
>@@ -1069,11 +1069,11 @@ static bool icp_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> {
> switch (pin) {
> case HPD_PORT_A:
>- return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_A);
>+ return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(HPD_PORT_A);
> case HPD_PORT_B:
>- return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_B);
>+ return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(HPD_PORT_B);
> case HPD_PORT_C:
>- return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_C);
>+ return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(HPD_PORT_C);
> default:
> return false;
> }
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index 969266e59f56..206e8ab64bd4 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -8317,16 +8317,16 @@ enum {
> /* south display engine interrupt: ICP/TGP */
> #define SDE_GMBUS_ICP (1 << 23)
> #define SDE_TC_HOTPLUG_ICP(tc_port) (1 << ((tc_port) + 24))
>-#define SDE_DDI_HOTPLUG_ICP(port) (1 << ((port) + 16))
>-#define SDE_DDI_MASK_ICP (SDE_DDI_HOTPLUG_ICP(PORT_B) | \
>- SDE_DDI_HOTPLUG_ICP(PORT_A))
>+#define SDE_DDI_HOTPLUG_ICP(hpd_pin) REG_BIT(16 + _HPD_PIN_DDI(hpd_pin))
>+#define SDE_DDI_MASK_ICP (SDE_DDI_HOTPLUG_ICP(HPD_PORT_B) | \
>+ SDE_DDI_HOTPLUG_ICP(HPD_PORT_A))
> #define SDE_TC_MASK_ICP (SDE_TC_HOTPLUG_ICP(TC_PORT_TC4) | \
> SDE_TC_HOTPLUG_ICP(TC_PORT_TC3) | \
> SDE_TC_HOTPLUG_ICP(TC_PORT_TC2) | \
> SDE_TC_HOTPLUG_ICP(TC_PORT_TC1))
>-#define SDE_DDI_MASK_TGP (SDE_DDI_HOTPLUG_ICP(PORT_C) | \
>- SDE_DDI_HOTPLUG_ICP(PORT_B) | \
>- SDE_DDI_HOTPLUG_ICP(PORT_A))
>+#define SDE_DDI_MASK_TGP (SDE_DDI_HOTPLUG_ICP(HPD_PORT_C) | \
>+ SDE_DDI_HOTPLUG_ICP(HPD_PORT_B) | \
>+ SDE_DDI_HOTPLUG_ICP(HPD_PORT_A))
Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
Lucas De Marchi
> #define SDE_TC_MASK_TGP (SDE_TC_HOTPLUG_ICP(TC_PORT_TC6) | \
> SDE_TC_HOTPLUG_ICP(TC_PORT_TC5) | \
> SDE_TC_HOTPLUG_ICP(TC_PORT_TC4) | \
>@@ -8400,12 +8400,12 @@ enum {
> */
>
> #define SHOTPLUG_CTL_DDI _MMIO(0xc4030)
>-#define SHOTPLUG_CTL_DDI_HPD_ENABLE(port) (0x8 << (4 * (port)))
>-#define SHOTPLUG_CTL_DDI_HPD_STATUS_MASK(port) (0x3 << (4 * (port)))
>-#define SHOTPLUG_CTL_DDI_HPD_NO_DETECT(port) (0x0 << (4 * (port)))
>-#define SHOTPLUG_CTL_DDI_HPD_SHORT_DETECT(port) (0x1 << (4 * (port)))
>-#define SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(port) (0x2 << (4 * (port)))
>-#define SHOTPLUG_CTL_DDI_HPD_SHORT_LONG_DETECT(port) (0x3 << (4 * (port)))
>+#define SHOTPLUG_CTL_DDI_HPD_ENABLE(hpd_pin) (0x8 << (_HPD_PIN_DDI(hpd_pin) * 4))
>+#define SHOTPLUG_CTL_DDI_HPD_STATUS_MASK(hpd_pin) (0x3 << (_HPD_PIN_DDI(hpd_pin) * 4))
>+#define SHOTPLUG_CTL_DDI_HPD_NO_DETECT(hpd_pin) (0x0 << (_HPD_PIN_DDI(hpd_pin) * 4))
>+#define SHOTPLUG_CTL_DDI_HPD_SHORT_DETECT(hpd_pin) (0x1 << (_HPD_PIN_DDI(hpd_pin) * 4))
>+#define SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(hpd_pin) (0x2 << (_HPD_PIN_DDI(hpd_pin) * 4))
>+#define SHOTPLUG_CTL_DDI_HPD_SHORT_LONG_DETECT(hpd_pin) (0x3 << (_HPD_PIN_DDI(hpd_pin) * 4))
>
> #define SHOTPLUG_CTL_TC _MMIO(0xc4034)
> #define ICP_TC_HPD_ENABLE(tc_port) (8 << (tc_port) * 4)
>@@ -8415,15 +8415,15 @@ enum {
> #define SHPD_FILTER_CNT _MMIO(0xc4038)
> #define SHPD_FILTER_CNT_500_ADJ 0x001D9
>
>-#define ICP_DDI_HPD_ENABLE_MASK (SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_B) | \
>- SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_A))
>+#define ICP_DDI_HPD_ENABLE_MASK (SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_B) | \
>+ SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_A))
> #define ICP_TC_HPD_ENABLE_MASK (ICP_TC_HPD_ENABLE(TC_PORT_TC4) | \
> ICP_TC_HPD_ENABLE(TC_PORT_TC3) | \
> ICP_TC_HPD_ENABLE(TC_PORT_TC2) | \
> ICP_TC_HPD_ENABLE(TC_PORT_TC1))
>-#define TGP_DDI_HPD_ENABLE_MASK (SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_C) | \
>- SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_B) | \
>- SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_A))
>+#define TGP_DDI_HPD_ENABLE_MASK (SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_C) | \
>+ SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_B) | \
>+ SHOTPLUG_CTL_DDI_HPD_ENABLE(HPD_PORT_A))
> #define TGP_TC_HPD_ENABLE_MASK (ICP_TC_HPD_ENABLE(TC_PORT_TC6) | \
> ICP_TC_HPD_ENABLE(TC_PORT_TC5) | \
> ICP_TC_HPD_ENABLE_MASK)
>--
>2.26.2
>
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