[Intel-gfx] [PATCH 4/6] drm/i915/dg1: Enable ports

[Lucas De Marchi]

On Wed, Oct 21, 2020 at 01:20:32AM -0700, Lucas De Marchi wrote:
>From: Aditya Swarup <aditya.swarup at intel.com>
>
>For DG1 we have a little of mix up wrt to DDI/port names and indexes.
>Bspec refers to the ports as DDIA, DDIB, DDI USBC1 and DDI USBC2
>(besides the DDIA, DDIB, DDIC, DDID), but the previous naming is the
>most unambiguous one. This means that for any register on Display Engine
>we should use the index of A, B, D and E. However in some places this is
>not true:
>
>- VBT: uses C and D and have to be mapped to D/E
>
>- IO/Combo: uses C and D, but we already differentiate those when
>  we created the phy vs port distinction.
>
>This additional mapping for VBT and phy are already covered in previous
>patches, so now we can initialize all the DDIs as A, B, D and E.
>
>v2: Squash previous patch enabling just ports A and B since most of the
>pumbling code is already merged now
>
>Cc: Matt Roper <matthew.d.roper at intel.com>
>Cc: Clinton Taylor <Clinton.A.Taylor at intel.com>
>Signed-off-by: Aditya Swarup <aditya.swarup at intel.com>
>Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>---
> drivers/gpu/drm/i915/display/intel_display.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>index 137e4a604f74..bc70c897de04 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.c
>+++ b/drivers/gpu/drm/i915/display/intel_display.c
>@@ -7337,7 +7337,7 @@ bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy)
> {
> 	if (phy == PHY_NONE)
> 		return false;
>-	else if (IS_ROCKETLAKE(dev_priv))
>+	else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
> 		return phy <= PHY_D;
> 	else if (IS_JSL_EHL(dev_priv))
> 		return phy <= PHY_C;
>@@ -7349,7 +7349,7 @@ bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy)
>
> bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)
> {
>-	if (IS_ROCKETLAKE(dev_priv))
>+	if (IS_ROCKETLAKE(dev_priv) || IS_DG1(dev_priv))

for consistency this should be

	if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))

Lucas De Marchi

> 		return false;
> 	else if (INTEL_GEN(dev_priv) >= 12)
> 		return phy >= PHY_D && phy <= PHY_I;
>@@ -7361,7 +7361,7 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)
>
> enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port)
> {
>-	if (IS_ROCKETLAKE(i915) && port >= PORT_D)
>+	if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_D)
> 		return (enum phy)port - 1;
> 	else if (IS_JSL_EHL(i915) && port == PORT_D)
> 		return PHY_A;
>@@ -17123,7 +17123,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
> 	if (!HAS_DISPLAY(dev_priv))
> 		return;
>
>-	if (IS_ROCKETLAKE(dev_priv)) {
>+	if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) {
> 		intel_ddi_init(dev_priv, PORT_A);
> 		intel_ddi_init(dev_priv, PORT_B);
> 		intel_ddi_init(dev_priv, PORT_D);	/* DDI TC1 */
>-- 
>2.28.0
>