[Intel-gfx] [PATCH v2 02/19] drm/i915: Add PORT_TCn aliases to enum port
Lucas De Marchi
lucas.demarchi at intel.com
Fri Oct 23 19:02:45 UTC 2020
On Fri, Oct 23, 2020 at 04:34:03PM +0300, Ville Syrjälä wrote:
>From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
>Since tgl the DDIs have been named A,B,C,TC1,TC2,TC3...
>Add the appropriate enum values for the TC DDIs to enum port.
>
>Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
Lucas De Marchi
>---
> drivers/gpu/drm/i915/display/intel_bios.c | 10 +++----
> drivers/gpu/drm/i915/display/intel_ddi.c | 4 +--
> drivers/gpu/drm/i915/display/intel_display.c | 28 ++++++++++----------
> drivers/gpu/drm/i915/display/intel_display.h | 8 ++++++
> 4 files changed, 28 insertions(+), 22 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
>index 0a309645fe06..ff825be0ac88 100644
>--- a/drivers/gpu/drm/i915/display/intel_bios.c
>+++ b/drivers/gpu/drm/i915/display/intel_bios.c
>@@ -1688,17 +1688,15 @@ static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
> [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
> };
> /*
>- * Bspec lists the ports as A, B, C, D - however internally in our
>- * driver we keep them as PORT_A, PORT_B, PORT_D and PORT_E so the
>- * registers in Display Engine match the right offsets. Apply the
>- * mapping here to translate from VBT to internal convention.
>+ * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
>+ * map to DDI A,B,TC1,TC2 respectively.
> */
> static const int rkl_port_mapping[][3] = {
> [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
> [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
> [PORT_C] = { -1 },
>- [PORT_D] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
>- [PORT_E] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
>+ [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
>+ [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
> };
>
> if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
>diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
>index 09811be08cfe..cf157e8f68cb 100644
>--- a/drivers/gpu/drm/i915/display/intel_ddi.c
>+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
>@@ -5069,8 +5069,8 @@ static bool hti_uses_phy(struct drm_i915_private *i915, enum phy phy)
> static enum hpd_pin tgl_hpd_pin(struct drm_i915_private *dev_priv,
> enum port port)
> {
>- if (port >= PORT_D)
>- return HPD_PORT_TC1 + port - PORT_D;
>+ if (port >= PORT_TC1)
>+ return HPD_PORT_TC1 + port - PORT_TC1;
> else
> return HPD_PORT_A + port - PORT_A;
> }
>diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>index da2a91122d44..cddbda5303ff 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.c
>+++ b/drivers/gpu/drm/i915/display/intel_display.c
>@@ -7463,12 +7463,12 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)
>
> enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port)
> {
>- if (IS_ROCKETLAKE(i915) && port >= PORT_D)
>- return (enum phy)port - 1;
>+ if (IS_ROCKETLAKE(i915) && port >= PORT_TC1)
>+ return PHY_C + port - PORT_TC1;
> else if (IS_JSL_EHL(i915) && port == PORT_D)
> return PHY_A;
>
>- return (enum phy)port;
>+ return PHY_A + port - PORT_A;
> }
>
> enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port)
>@@ -7477,9 +7477,9 @@ enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port)
> return TC_PORT_NONE;
>
> if (INTEL_GEN(dev_priv) >= 12)
>- return port - PORT_D;
>-
>- return port - PORT_C;
>+ return TC_PORT_1 + port - PORT_TC1;
>+ else
>+ return TC_PORT_1 + port - PORT_C;
> }
>
> enum intel_display_power_domain intel_port_to_power_domain(enum port port)
>@@ -17216,17 +17216,17 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
> if (IS_ROCKETLAKE(dev_priv)) {
> intel_ddi_init(dev_priv, PORT_A);
> intel_ddi_init(dev_priv, PORT_B);
>- intel_ddi_init(dev_priv, PORT_D); /* DDI TC1 */
>- intel_ddi_init(dev_priv, PORT_E); /* DDI TC2 */
>+ intel_ddi_init(dev_priv, PORT_TC1);
>+ intel_ddi_init(dev_priv, PORT_TC2);
> } else if (INTEL_GEN(dev_priv) >= 12) {
> intel_ddi_init(dev_priv, PORT_A);
> intel_ddi_init(dev_priv, PORT_B);
>- intel_ddi_init(dev_priv, PORT_D);
>- intel_ddi_init(dev_priv, PORT_E);
>- intel_ddi_init(dev_priv, PORT_F);
>- intel_ddi_init(dev_priv, PORT_G);
>- intel_ddi_init(dev_priv, PORT_H);
>- intel_ddi_init(dev_priv, PORT_I);
>+ intel_ddi_init(dev_priv, PORT_TC1);
>+ intel_ddi_init(dev_priv, PORT_TC2);
>+ intel_ddi_init(dev_priv, PORT_TC2);
>+ intel_ddi_init(dev_priv, PORT_TC4);
>+ intel_ddi_init(dev_priv, PORT_TC5);
>+ intel_ddi_init(dev_priv, PORT_TC6);
> icl_dsi_init(dev_priv);
> } else if (IS_JSL_EHL(dev_priv)) {
> intel_ddi_init(dev_priv, PORT_A);
>diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
>index 1b7ae1d507f2..747aec8e8580 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.h
>+++ b/drivers/gpu/drm/i915/display/intel_display.h
>@@ -208,6 +208,14 @@ enum port {
> PORT_H,
> PORT_I,
>
>+ /* tgl+ */
>+ PORT_TC1 = PORT_D,
>+ PORT_TC2,
>+ PORT_TC3,
>+ PORT_TC4,
>+ PORT_TC5,
>+ PORT_TC6,
>+
> I915_MAX_PORTS
> };
>
>--
>2.26.2
>
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