[Intel-gfx] [PATCH v2 18/19] drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+

[Lucas De Marchi]

On Fri, Oct 23, 2020 at 04:34:19PM +0300, Ville Syrjälä wrote:
>From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
>No reason not to use GEN3_IRQ_INIT() on icp+.
>
>Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi
>---
> drivers/gpu/drm/i915/i915_irq.c | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index 04a6f322110d..b4eddf49a62a 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -3713,14 +3713,10 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv)
>
> static void icp_irq_postinstall(struct drm_i915_private *dev_priv)
> {
>+	struct intel_uncore *uncore = &dev_priv->uncore;
> 	u32 mask = SDE_GMBUS_ICP;
>
>-	drm_WARN_ON(&dev_priv->drm, I915_READ(SDEIER) != 0);
>-	I915_WRITE(SDEIER, 0xffffffff);
>-	POSTING_READ(SDEIER);
>-
>-	gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR);
>-	I915_WRITE(SDEIMR, ~mask);
>+	GEN3_IRQ_INIT(uncore, SDE, ~mask, 0xffffffff);
> }
>
> static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)
>-- 
>2.26.2
>
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