[Intel-gfx] [PATCH 1/6] drm/i915/display/psr: Calculate selective fetch plane registers

Mun, Gwan-gyeong gwan-gyeong.mun at intel.com
Mon Oct 26 21:13:49 UTC 2020


On Tue, 2020-10-13 at 16:01 -0700, José Roberto de Souza wrote:
> Add the calculations to set plane selective fetch registers depending
> in the value of the area damaged.
> It is still using the whole plane area as damaged but that will
> change
> in next patches.
> 
> BSpec: 55229
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> ---
>  .../drm/i915/display/intel_display_types.h    |  2 ++
>  drivers/gpu/drm/i915/display/intel_psr.c      | 22 ++++++++++++++---
> --
>  2 files changed, 18 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 0b5df8e44966..aeceb378bca3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -603,6 +603,8 @@ struct intel_plane_state {
>  	u32 planar_slave;
>  
>  	struct drm_intel_sprite_colorkey ckey;
> +
> +	struct drm_rect psr2_sel_fetch_area;
>  };
>  
>  struct intel_initial_plane_config {
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index a591a475f148..773a5b5fa078 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1173,6 +1173,7 @@ void intel_psr2_program_plane_sel_fetch(struct
> intel_plane *plane,
>  {
>  	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>  	enum pipe pipe = plane->pipe;
> +	const struct drm_rect *clip;
>  	u32 val;
>  
>  	if (!crtc_state->enable_psr2_sel_fetch)
> @@ -1184,16 +1185,20 @@ void
> intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
>  	if (!val || plane->id == PLANE_CURSOR)
>  		return;
>  
> -	val = plane_state->uapi.dst.y1 << 16 | plane_state-
> >uapi.dst.x1;
> +	clip = &plane_state->psr2_sel_fetch_area;
> +
> +	val = (clip->y1 + plane_state->uapi.dst.y1) << 16;

> +	val |= plane_state->uapi.dst.x1;
>  	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_POS(pipe, plane-
> >id), val);
>  
> -	val = plane_state->color_plane[color_plane].y << 16;
> +	/* TODO: consider tiling and auxiliary surfaces */
> +	val = (clip->y1 + plane_state->color_plane[color_plane].y) <<
> 16;
>  	val |= plane_state->color_plane[color_plane].x;
>  	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_OFFSET(pipe, plane-
> >id),
>  			  val);
>  
>  	/* Sizes are 0 based */
> -	val = ((drm_rect_height(&plane_state->uapi.src) >> 16) - 1) <<
> 16;
> +	val = (drm_rect_height(clip) - 1) << 16;
>  	val |= (drm_rect_width(&plane_state->uapi.src) >> 16) - 1;
>  	intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_SIZE(pipe, plane-
> >id), val);
>  }
> @@ -1267,7 +1272,7 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  
>  	for_each_oldnew_intel_plane_in_state(state, plane,
> old_plane_state,
>  					     new_plane_state, i) {
> -		struct drm_rect temp;
> +		struct drm_rect *sel_fetch_area, temp;
>  
>  		if (new_plane_state->uapi.crtc != crtc_state-
> >uapi.crtc)
>  			continue;
> @@ -1290,8 +1295,13 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>  		 * For now doing a selective fetch in the whole plane
> area,
>  		 * optimizations will come in the future.
>  		 */
> -		temp.y1 = new_plane_state->uapi.dst.y1;
> -		temp.y2 = new_plane_state->uapi.dst.y2;
> +		sel_fetch_area = &new_plane_state->psr2_sel_fetch_area;
> +		sel_fetch_area->y1 = new_plane_state->uapi.src.y1 >>
> 16;
> +		sel_fetch_area->y2 = new_plane_state->uapi.src.y2 >>
> 16;
> +
> +		temp = *sel_fetch_area;
> +		temp.y1 += new_plane_state->uapi.dst.y1 >> 16;
> +		temp.y2 += new_plane_state->uapi.dst.y1 >> 16;
It adds src to dst. 
For the whole plane damage area, these previous code looks correct.

 temp.y1 = new_plane_state->uapi.dst.y1;
 temp.y2 = new_plane_state->uapi.dst.y2;

>  		clip_area_update(&pipe_clip, &temp);
>  	}
>  


More information about the Intel-gfx mailing list