[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/dg1: map/unmap pll clocks
Patchwork
patchwork at emeril.freedesktop.org
Tue Oct 27 23:27:12 UTC 2020
== Series Details ==
Series: series starting with [1/3] drm/i915/dg1: map/unmap pll clocks
URL : https://patchwork.freedesktop.org/series/83069/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8bd39690adad drm/i915/dg1: map/unmap pll clocks
-:253: WARNING:LONG_LINE: line length of 116 exceeds 100 columns
#253: FILE: drivers/gpu/drm/i915/i915_reg.h:10359:
+#define DG1_DPCLKA_CFGCR0_DDI_CLK_SEL(pll, phy) (_DG1_DPCLKA_PLL_IDX(pll) << (_DG1_DPCLKA_PHY_IDX(phy) * 2))
-:255: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'phy' - possible side-effects?
#255: FILE: drivers/gpu/drm/i915/i915_reg.h:10361:
+#define DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_TO_PLL_ID(val, phy) \
+ ((((val) & DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy)) >> (_DG1_DPCLKA_PHY_IDX(phy) * 2)) + \
+ ((phy) >= PHY_C ? DPLL_ID_DG1_DPLL2 : DPLL_ID_DG1_DPLL0))
total: 0 errors, 1 warnings, 1 checks, 212 lines checked
00b4fd3ef70e drm/i915/dg1: Enable ports
aacc34d823b5 drm/i915/dg1: make Wa_22010271021 permanent
More information about the Intel-gfx
mailing list