[Intel-gfx] [PATCH 2/3] drm/i915: move gen4 GCDGMBUS save/restore to display save/restore

[Ville Syrjälä]

On Thu, Sep 10, 2020 at 12:52:26PM +0300, Jani Nikula wrote:
> Logically part of the display save/restore. No functional changes.
> 

Somewhat tempted to move this into the gmbus code proper.
But we don't have a gmbus resume hook atm so would need to
add one.

In the meantime:
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_suspend.c | 21 ++++++++++++---------
>  1 file changed, 12 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
> index ed2be3489f8e..4a93247942b7 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -34,6 +34,8 @@
>  
>  static void i915_save_display(struct drm_i915_private *dev_priv)
>  {
> +	struct pci_dev *pdev = dev_priv->drm.pdev;
> +
>  	/* Display arbitration control */
>  	if (INTEL_GEN(dev_priv) <= 4)
>  		dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);
> @@ -41,10 +43,20 @@ static void i915_save_display(struct drm_i915_private *dev_priv)
>  	/* save FBC interval */
>  	if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
>  		dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);
> +
> +	if (IS_GEN(dev_priv, 4))
> +		pci_read_config_word(pdev, GCDGMBUS,
> +				     &dev_priv->regfile.saveGCDGMBUS);
>  }
>  
>  static void i915_restore_display(struct drm_i915_private *dev_priv)
>  {
> +	struct pci_dev *pdev = dev_priv->drm.pdev;
> +
> +	if (IS_GEN(dev_priv, 4))
> +		pci_write_config_word(pdev, GCDGMBUS,
> +				      dev_priv->regfile.saveGCDGMBUS);
> +
>  	/* Display arbitration */
>  	if (INTEL_GEN(dev_priv) <= 4)
>  		I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);
> @@ -61,15 +73,10 @@ static void i915_restore_display(struct drm_i915_private *dev_priv)
>  
>  int i915_save_state(struct drm_i915_private *dev_priv)
>  {
> -	struct pci_dev *pdev = dev_priv->drm.pdev;
>  	int i;
>  
>  	i915_save_display(dev_priv);
>  
> -	if (IS_GEN(dev_priv, 4))
> -		pci_read_config_word(pdev, GCDGMBUS,
> -				     &dev_priv->regfile.saveGCDGMBUS);
> -
>  	/* Cache mode state */
>  	if (INTEL_GEN(dev_priv) < 7)
>  		dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
> @@ -102,12 +109,8 @@ int i915_save_state(struct drm_i915_private *dev_priv)
>  
>  int i915_restore_state(struct drm_i915_private *dev_priv)
>  {
> -	struct pci_dev *pdev = dev_priv->drm.pdev;
>  	int i;
>  
> -	if (IS_GEN(dev_priv, 4))
> -		pci_write_config_word(pdev, GCDGMBUS,
> -				      dev_priv->regfile.saveGCDGMBUS);
>  	i915_restore_display(dev_priv);
>  
>  	/* Cache mode state */
> -- 
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel