[Intel-gfx] [PATCH 04/12] drm/i915/guc: Remove GUC_CTL_CTXINFO init param

[Daniele Ceraolo Spurio]

On 9/16/2020 10:16 AM, John.C.Harrison at Intel.com wrote:
> From: Matthew Brost <matthew.brost at intel.com>
>
> The new GuC interface has removed GUC_CTL_CTXINFO from initialization
> params.
>
> Cc: John Harrison <john.c.harrison at intel.com>
> Signed-off-by: Matthew Brost <matthew.brost at intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc.c      | 18 ------------------
>   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 15 +++++----------
>   2 files changed, 5 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 942c7c187adb..6909da1e1a73 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -213,23 +213,6 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc)
>   	return flags;
>   }
>   
> -static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
> -{
> -	u32 flags = 0;
> -
> -	if (intel_guc_submission_is_used(guc)) {
> -		u32 ctxnum, base;
> -
> -		base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
> -		ctxnum = GUC_MAX_STAGE_DESCRIPTORS / 16;
> -
> -		base >>= PAGE_SHIFT;
> -		flags |= (base << GUC_CTL_BASE_ADDR_SHIFT) |
> -			(ctxnum << GUC_CTL_CTXNUM_IN16_SHIFT);
> -	}
> -	return flags;
> -}
> -
>   static u32 guc_ctl_log_params_flags(struct intel_guc *guc)
>   {
>   	u32 offset = intel_guc_ggtt_offset(guc, guc->log.vma) >> PAGE_SHIFT;
> @@ -291,7 +274,6 @@ static void guc_init_params(struct intel_guc *guc)
>   
>   	BUILD_BUG_ON(sizeof(guc->params) != GUC_CTL_MAX_DWORDS * sizeof(u32));
>   
> -	params[GUC_CTL_CTXINFO] = guc_ctl_ctxinfo_flags(guc);
>   	params[GUC_CTL_LOG_PARAMS] = guc_ctl_log_params_flags(guc);
>   	params[GUC_CTL_FEATURE] = guc_ctl_feature_flags(guc);
>   	params[GUC_CTL_DEBUG] = guc_ctl_debug_flags(guc);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> index fa19c9d248f2..d4e2c32f44cf 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> @@ -62,12 +62,7 @@
>   #define GUC_STAGE_DESC_ATTR_PCH		BIT(6)
>   #define GUC_STAGE_DESC_ATTR_TERMINATED	BIT(7)
>   
> -/* New GuC control data */
> -#define GUC_CTL_CTXINFO			0
> -#define   GUC_CTL_CTXNUM_IN16_SHIFT	0
> -#define   GUC_CTL_BASE_ADDR_SHIFT	12
> -
> -#define GUC_CTL_LOG_PARAMS		1
> +#define GUC_CTL_LOG_PARAMS		0
>   #define   GUC_LOG_VALID			(1 << 0)
>   #define   GUC_LOG_NOTIFY_ON_HALF_FULL	(1 << 1)
>   #define   GUC_LOG_ALLOC_IN_MEGABYTE	(1 << 3)
> @@ -79,11 +74,11 @@
>   #define   GUC_LOG_ISR_MASK	        (0x7 << GUC_LOG_ISR_SHIFT)
>   #define   GUC_LOG_BUF_ADDR_SHIFT	12
>   
> -#define GUC_CTL_WA			2
> -#define GUC_CTL_FEATURE			3
> +#define GUC_CTL_WA			1
> +#define GUC_CTL_FEATURE			2
>   #define   GUC_CTL_DISABLE_SCHEDULER	(1 << 14)
>   
> -#define GUC_CTL_DEBUG			4
> +#define GUC_CTL_DEBUG			3
>   #define   GUC_LOG_VERBOSITY_SHIFT	0
>   #define   GUC_LOG_VERBOSITY_LOW		(0 << GUC_LOG_VERBOSITY_SHIFT)
>   #define   GUC_LOG_VERBOSITY_MED		(1 << GUC_LOG_VERBOSITY_SHIFT)
> @@ -97,7 +92,7 @@
>   #define   GUC_LOG_DISABLED		(1 << 6)
>   #define   GUC_PROFILE_ENABLED		(1 << 7)
>   
> -#define GUC_CTL_ADS			5
> +#define GUC_CTL_ADS			4
>   #define   GUC_ADS_ADDR_SHIFT		1
>   #define   GUC_ADS_ADDR_MASK		(0xFFFFF << GUC_ADS_ADDR_SHIFT)
>