[Intel-gfx] [PATCH 1/7] drm/i915: Fix DP link training pattern mask

[Imre Deak]

On Tue, Sep 22, 2020 at 04:13:23PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 22, 2020 at 03:51:00PM +0300, Imre Deak wrote:
> > An LTTPR can be trained with training pattern 4 even if the DPCD
> > revision is < 1.4, but drm_dp_training_pattern_mask() would change
> > pattern 4 to pattern 3 on those DPCD revisions.
> > 
> > Since intel_dp_training_pattern() makes already sure that the proper
> > training pattern is used, all that needs to be masked out is the
> > scrambling disable flag, which is or'd to the mask later based on the
> > training pattern.
> > 
> > Signed-off-by: Imre Deak <imre.deak at intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c              |  3 +--
> >  drivers/gpu/drm/i915/display/intel_dp.c               | 10 +++++-----
> >  drivers/gpu/drm/i915/display/intel_dp_link_training.c |  2 +-
> >  3 files changed, 7 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 4d06178cd76c..946a3b6f2d10 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -4158,13 +4158,12 @@ static void intel_ddi_set_link_train(struct intel_dp *intel_dp,
> >  				     u8 dp_train_pat)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	u8 train_pat_mask = drm_dp_training_pattern_mask(intel_dp->dpcd);
> >  	u32 temp;
> >  
> >  	temp = intel_de_read(dev_priv, intel_dp->regs.dp_tp_ctl);
> >  
> >  	temp &= ~DP_TP_CTL_LINK_TRAIN_MASK;
> > -	switch (dp_train_pat & train_pat_mask) {
> > +	switch (dp_train_pat & ~DP_LINK_SCRAMBLING_DISABLE) {
> 
> Maybe introduce a helper to do the masking for us?

Ok, will add intel_dp_training_pattern_symbol().

> 
> Anyways
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> >  	case DP_TRAINING_PATTERN_DISABLE:
> >  		temp |= DP_TP_CTL_LINK_TRAIN_NORMAL;
> >  		break;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index bf1e9cf1c0f3..2a4a9c0e7427 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -3778,7 +3778,7 @@ cpt_set_link_train(struct intel_dp *intel_dp,
> >  
> >  	*DP &= ~DP_LINK_TRAIN_MASK_CPT;
> >  
> > -	switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) {
> > +	switch (dp_train_pat & ~DP_LINK_SCRAMBLING_DISABLE) {
> >  	case DP_TRAINING_PATTERN_DISABLE:
> >  		*DP |= DP_LINK_TRAIN_OFF_CPT;
> >  		break;
> > @@ -3808,7 +3808,7 @@ g4x_set_link_train(struct intel_dp *intel_dp,
> >  
> >  	*DP &= ~DP_LINK_TRAIN_MASK;
> >  
> > -	switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) {
> > +	switch (dp_train_pat & ~DP_LINK_SCRAMBLING_DISABLE) {
> >  	case DP_TRAINING_PATTERN_DISABLE:
> >  		*DP |= DP_LINK_TRAIN_OFF;
> >  		break;
> > @@ -4498,12 +4498,12 @@ intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
> >  				       u8 dp_train_pat)
> >  {
> >  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > -	u8 train_pat_mask = drm_dp_training_pattern_mask(intel_dp->dpcd);
> >  
> > -	if (dp_train_pat & train_pat_mask)
> > +	if ((dp_train_pat & ~DP_LINK_SCRAMBLING_DISABLE) !=
> > +	    DP_TRAINING_PATTERN_DISABLE)
> >  		drm_dbg_kms(&dev_priv->drm,
> >  			    "Using DP training pattern TPS%d\n",
> > -			    dp_train_pat & train_pat_mask);
> > +			    dp_train_pat & ~DP_LINK_SCRAMBLING_DISABLE);
> >  
> >  	intel_dp->set_link_train(intel_dp, dp_train_pat);
> >  }
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > index f2c8b56be9ea..f8b53c5b5777 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > @@ -96,7 +96,7 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
> >  	intel_dp_program_link_training_pattern(intel_dp, dp_train_pat);
> >  
> >  	buf[0] = dp_train_pat;
> > -	if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) ==
> > +	if ((dp_train_pat & ~DP_LINK_SCRAMBLING_DISABLE) ==
> >  	    DP_TRAINING_PATTERN_DISABLE) {
> >  		/* don't write DP_TRAINING_LANEx_SET on disable */
> >  		len = 1;
> > -- 
> > 2.17.1
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel