[Intel-gfx] [PATCH] drm/i915: Implement display WA #1142:kbl, cfl, cml

[Ville Syrjälä]

On Thu, Sep 24, 2020 at 08:43:33PM +0000, Souza, Jose wrote:
> On Thu, 2020-09-24 at 22:48 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <
> > ville.syrjala at linux.intel.com
> > >
> > 
> > Implement display w/a #1142. This supposedly fixes some underruns
> > with FBC+VTd. Bspec says we should use the same programming regardless
> > of circumstances. Apparently we should flip the magic bits before
> > turning on any planes so let's put this into the early w/as.
> > 
> > Cc: Lee Shawn C <
> > shawn.c.lee at intel.com
> > >
> > Signed-off-by: Ville Syrjälä <
> > ville.syrjala at linux.intel.com
> > >
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++++
> >  drivers/gpu/drm/i915/i915_reg.h              | 3 +++
> >  2 files changed, 12 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 5a9d933e425a..9d64187cfd56 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -18677,6 +18677,15 @@ static void intel_early_display_was(struct drm_i915_private *dev_priv)
> >  		intel_de_write(dev_priv, CHICKEN_PAR1_1,
> >  			       intel_de_read(dev_priv, CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
> >  	}
> > +
> > +	if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv)) {
> 
> WA mentions that it is required only for KBL, but if Lee says that this helps with his CML issues.

I think there's a note somewhere that says cfl+ are derived from the
last kbl, and I don't think there's are specific cfl/cml tags for w/as.

> 
> Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

Ta.

> 
> > +		/* Display WA #1142:kbl,cfl,cml */
> > +		intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
> > +			     KBL_ARB_FILL_SPARE_22, KBL_ARB_FILL_SPARE_22);
> > +		intel_de_rmw(dev_priv, CHICKEN_MISC_2,
> > +			     KBL_ARB_FILL_SPARE_13 | KBL_ARB_FILL_SPARE_14,
> > +			     KBL_ARB_FILL_SPARE_14);
> > +	}
> >  }
> >  
> >  static void ibx_sanitize_pch_hdmi_port(struct drm_i915_private *dev_priv,
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index d805d4da6181..3f97cc0fcbf1 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -7865,6 +7865,7 @@ enum {
> >  # define CHICKEN3_DGMG_DONE_FIX_DISABLE		(1 << 2)
> >  
> >  #define CHICKEN_PAR1_1			_MMIO(0x42080)
> > +#define  KBL_ARB_FILL_SPARE_22		REG_BIT(22)
> >  #define  DIS_RAM_BYPASS_PSR2_MAN_TRACK	(1 << 16)
> >  #define  SKL_DE_COMPRESSED_HASH_MODE	(1 << 15)
> >  #define  DPA_MASK_VBLANK_SRD		(1 << 15)
> > @@ -7877,6 +7878,8 @@ enum {
> >  
> >  #define CHICKEN_MISC_2		_MMIO(0x42084)
> >  #define  CNL_COMP_PWR_DOWN	(1 << 23)
> > +#define  KBL_ARB_FILL_SPARE_14	REG_BIT(14)
> > +#define  KBL_ARB_FILL_SPARE_13	REG_BIT(13)
> >  #define  GLK_CL2_PWR_DOWN	(1 << 12)
> >  #define  GLK_CL1_PWR_DOWN	(1 << 11)
> >  #define  GLK_CL0_PWR_DOWN	(1 << 10)
> > 

-- 
Ville Syrjälä
Intel