[Intel-gfx] [PATCH 1/2] drm/i915/display: Implement Wa_14013723622

[Mun, Gwan-gyeong]

Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
On Thu, 2021-04-08 at 13:49 -0700, José Roberto de Souza wrote:
> This WA fix some display glitches when the system is under high
> memory pressure.
> 
> BSpec: 52890
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 3 +++
>  drivers/gpu/drm/i915/intel_pm.c | 5 +++++
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index cbf7a60afe54..f4a779643f4d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -12549,4 +12549,7 @@ enum skl_power_gate {
>  #define TGL_ROOT_DEVICE_SKU_ULX                0x2
>  #define TGL_ROOT_DEVICE_SKU_ULT                0x4
>  
> +#define CLKREQ_POLICY                  _MMIO(0x101038)
> +#define  CLKREQ_POLICY_MEM_UP_OVRD     REG_BIT(1)
> +
>  #endif /* _I915_REG_H_ */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 32f301ca3ab0..8e39e30036b2 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7141,6 +7141,11 @@ static void gen12lp_init_clock_gating(struct
> drm_i915_private *dev_priv)
>         /* Wa_14011059788:tgl,rkl,adl_s,dg1 */
>         intel_uncore_rmw(&dev_priv->uncore,
> GEN10_DFR_RATIO_EN_AND_CHICKEN,
>                          0, DFR_DISABLE);
> +
> +       /* Wa_14013723622:tgl,rkl,dg1,adl-s */
> +       if (DISPLAY_VER(dev_priv) == 12)
> +               intel_uncore_rmw(&dev_priv->uncore, CLKREQ_POLICY,
> +                                CLKREQ_POLICY_MEM_UP_OVRD, 0);
>  }
>  
>  static void dg1_init_clock_gating(struct drm_i915_private *dev_priv)