[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for More DG1 enabling

Patchwork patchwork at emeril.freedesktop.org
Mon Apr 12 11:07:14 UTC 2021


== Series Details ==

Series: More DG1 enabling
URL   : https://patchwork.freedesktop.org/series/88947/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
525b7ae56cfd drm/i915/gt: Skip aperture remapping selftest where there is no aperture
530e7443c201 drm/i915/selftests: Only query RAPL for integrated power measurements
c46573ddee8d drm/i915: Create stolen memory region from local memory
-:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#13: 
      as stolen-local or stolen-system based on this value won't work. Split

total: 0 errors, 1 warnings, 0 checks, 231 lines checked
9ab764a5a21b drm/i915/stolen: treat stolen local as normal local memory
154d7cbfda7f drm/i915/stolen: enforce the min_page_size contract
03c0cc0dae7f drm/i915/stolen: pass the allocation flags
693ca8d4d780 drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on discrete
4ec6aedb7ac2 drm/i915: Return error value when bo not in LMEM for discrete
e861362b0f25 drm/i915/lmem: Fail driver init if LMEM training failed
4bd6b41215c3 drm/i915/dg1: Fix mapping type for default state object
a7c90db9a5c4 drm/i915: Update the helper to set correct mapping
-:68: CHECK:BRACES: Unbalanced braces around else statement
#68: FILE: drivers/gpu/drm/i915/gt/intel_ring.c:56:
+	else {

total: 0 errors, 0 warnings, 1 checks, 132 lines checked
e03946b5bf8c drm/i915/lmem: Bypass aperture when lmem is available
e793b2d75109 drm/i915/dg1: Read OPROM via SPI controller
dd926fd22135 drm/i915/oprom: Basic sanitization
-:140: WARNING:LONG_LINE: line length of 122 exceeds 100 columns
#140: FILE: drivers/gpu/drm/i915/display/intel_opregion.c:996:
+	size_512_bytes = parse_ptr[((struct expansion_rom_header *)parse_ptr)->pcistructoffset + PCI_IMAGE_LENGTH_OFFSET];

-:141: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#141: FILE: drivers/gpu/drm/i915/display/intel_opregion.c:997:
+	*code_type = parse_ptr[((struct expansion_rom_header *)parse_ptr)->pcistructoffset + PCI_CODE_TYPE_OFFSET];

-:142: WARNING:LONG_LINE: line length of 125 exceeds 100 columns
#142: FILE: drivers/gpu/drm/i915/display/intel_opregion.c:998:
+	*last_img = parse_ptr[((struct expansion_rom_header *)parse_ptr)->pcistructoffset + PCI_LAST_IMAGE_INDICATOR_OFFSET];

total: 0 errors, 3 warnings, 0 checks, 304 lines checked
2f21e3309e84 drm/i915: WA for zero memory channel
-:32: ERROR:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author '"José Roberto de Souza" <jose.souza at intel.com>'

total: 1 errors, 0 warnings, 0 checks, 7 lines checked
acf0a81fb877 drm/i915/dg1: Compute MEM Bandwidth using MCHBAR
4988227f5fee drm/i915/dg1: Double memory bandwidth available
a1d3eec6b5bc drm/i915/gtt: map the PD up front
-:10: WARNING:TYPO_SPELLING: 'maping' may be misspelled - perhaps 'mapping'?
#10: 
maping code that for simple single page shmemfs object will return a
^^^^^^

total: 0 errors, 1 warnings, 0 checks, 403 lines checked
817240b12321 drm/i915/gtt/dgfx: place the PD in LMEM




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