[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Apply CMTG clock disabling WA while DPLL0 is enabled
Patchwork
patchwork at emeril.freedesktop.org
Tue Aug 3 14:38:22 UTC 2021
== Series Details ==
Series: drm/i915: Apply CMTG clock disabling WA while DPLL0 is enabled
URL : https://patchwork.freedesktop.org/series/93318/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10440 -> Patchwork_20762
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20762/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_20762:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt at i915_selftest@live at requests:
- {fi-tgl-dsi}: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10440/fi-tgl-dsi/igt@i915_selftest@live@requests.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20762/fi-tgl-dsi/igt@i915_selftest@live@requests.html
Known issues
------------
Here are the changes found in Patchwork_20762 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt at gem_exec_parallel@engines at userptr:
- fi-pnv-d510: [PASS][3] -> [INCOMPLETE][4] ([i915#299])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10440/fi-pnv-d510/igt@gem_exec_parallel@engines@userptr.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20762/fi-pnv-d510/igt@gem_exec_parallel@engines@userptr.html
* igt at gem_exec_suspend@basic-s0:
- fi-tgl-u2: [PASS][5] -> [FAIL][6] ([i915#1888])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10440/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20762/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html
* igt at runner@aborted:
- fi-pnv-d510: NOTRUN -> [FAIL][7] ([i915#2403] / [i915#2505] / [i915#2722])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20762/fi-pnv-d510/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
[i915#2505]: https://gitlab.freedesktop.org/drm/intel/issues/2505
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#299]: https://gitlab.freedesktop.org/drm/intel/issues/299
Participating hosts (37 -> 33)
------------------------------
Missing (4): fi-bdw-samus fi-bsw-cyan bat-jsl-1 fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_10440 -> Patchwork_20762
CI-20190529: 20190529
CI_DRM_10440: 95b785be5ff0413ff419b30da574a7e3d353b33b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6159: 6135b9cc319ed965e3aafb5b2ae2abf4762a06b2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20762: 31185812783debebc9c19772194bdd17d6bc0812 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
31185812783d drm/i915: Apply CMTG clock disabling WA while DPLL0 is enabled
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20762/index.html
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