[Intel-gfx] [PATCH v5 9/9] drm/i915/dg2: Configure PCON in DP pre-enable path

Souza, Jose jose.souza at intel.com
Tue Aug 10 21:51:35 UTC 2021


On Thu, 2021-08-05 at 09:36 -0700, Matt Roper wrote:
> From: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> 
> Add the functions to configure HDMI2.1 pcon for DG2, before DP link
> training.

Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index d8162951b78f..e932fd0fe7e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2402,6 +2402,7 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	if (!is_mst)
>  		intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
>  
> +	intel_dp_configure_protocol_converter(intel_dp, crtc_state);
>  	intel_dp_sink_set_decompression_state(intel_dp, crtc_state, true);
>  	/*
>  	 * DDI FEC: "anticipates enabling FEC encoding sets the FEC_READY bit
> @@ -2409,6 +2410,8 @@ static void dg2_ddi_pre_enable_dp(struct intel_atomic_state *state,
>  	 * training
>  	 */
>  	intel_dp_sink_set_fec_ready(intel_dp, crtc_state);
> +	intel_dp_check_frl_training(intel_dp);
> +	intel_dp_pcon_dsc_configure(intel_dp, crtc_state);
>  
>  	/*
>  	 * 5.h Follow DisplayPort specification training sequence (see notes for



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