[Intel-gfx] [PATCH] drm/i915: Only access SFC_DONE when media domain is not fused off

[Matt Roper]

On Wed, Aug 11, 2021 at 01:55:48PM -0700, Souza, Jose wrote:
> On Fri, 2021-08-06 at 10:41 -0700, Matt Roper wrote:
> > The SFC_DONE register lives within the corresponding VD0/VD2/VD4/VD6
> > forcewake domain and is not accessible if the vdbox in that domain is
> > fused off and the forcewake is not initialized.
> > 
> > This mistake went unnoticed because until recently we were using the
> > wrong register offset for the SFC_DONE register; once the register
> > offset was corrected, we started hitting errors like
> > 
> >   <4> [544.989065] i915 0000:cc:00.0: Uninitialized forcewake domain(s) 0x80 accessed at 0x1ce000
> > 
> > on parts with fused-off vdbox engines.
> 
> Reviewed-by: José Roberto de Souza <jose.souza at intel.com>

Applied to drm-intel-next.  Thanks for the review.


Matt

> 
> > 
> > Fixes: e50dbdbfd9fb ("drm/i915/tgl: Add SFC instdone to error state")
> > Fixes: 82929a2140eb ("drm/i915: Correct SFC_DONE register offset")
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> > Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gpu_error.c | 19 ++++++++++++++++++-
> >  1 file changed, 18 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> > index 0f08bcfbe964..9cf6ac575de1 100644
> > --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> > +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> > @@ -727,9 +727,18 @@ static void err_print_gt(struct drm_i915_error_state_buf *m,
> >  	if (GRAPHICS_VER(m->i915) >= 12) {
> >  		int i;
> >  
> > -		for (i = 0; i < GEN12_SFC_DONE_MAX; i++)
> > +		for (i = 0; i < GEN12_SFC_DONE_MAX; i++) {
> > +			/*
> > +			 * SFC_DONE resides in the VD forcewake domain, so it
> > +			 * only exists if the corresponding VCS engine is
> > +			 * present.
> > +			 */
> > +			if (!HAS_ENGINE(gt->_gt, _VCS(i * 2)))
> > +				continue;
> > +
> >  			err_printf(m, "  SFC_DONE[%d]: 0x%08x\n", i,
> >  				   gt->sfc_done[i]);
> > +		}
> >  
> >  		err_printf(m, "  GAM_DONE: 0x%08x\n", gt->gam_done);
> >  	}
> > @@ -1598,6 +1607,14 @@ static void gt_record_regs(struct intel_gt_coredump *gt)
> >  
> >  	if (GRAPHICS_VER(i915) >= 12) {
> >  		for (i = 0; i < GEN12_SFC_DONE_MAX; i++) {
> > +			/*
> > +			 * SFC_DONE resides in the VD forcewake domain, so it
> > +			 * only exists if the corresponding VCS engine is
> > +			 * present.
> > +			 */
> > +			if (!HAS_ENGINE(gt->_gt, _VCS(i * 2)))
> > +				continue;
> > +
> >  			gt->sfc_done[i] =
> >  				intel_uncore_read(uncore, GEN12_SFC_DONE(i));
> >  		}
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795