[Intel-gfx] [PATCH 0/5] drm/i915/gt: Initialize unused MOCS entries to L3_WB

[Ayaz A Siddiqui]

Gen >= 12 onwards MOCS table doesn't have a setting for PTE
so I915_MOCS_PTE is not a valid index and it will have different
MOCS values based on the platform.

To detect these kinds of misprogramming, all the unspecified and
reserved MOCS indexes are set to WB_L3.

This series also contains patches to program BLIT_CCTL and
CMD_CCTL registers to UC.

Since we are quite late to update MOCS table for TGL so added
a new MOCS table for ADL family.

Apoorva Singh (1):
  drm/i915/gt: Set BLIT_CCTL reg to un-cached

Ayaz A Siddiqui (3):
  drm/i915/gt: Add support of mocs propagation
  drm/i915/gt: Initialize unused MOCS entries with device specific
    values
  drm/i95/adl: Define MOCS table for Alderlake

Srinivasan Shanmugam (1):
  drm/i915/gt: Use cmd_cctl override for platforms >= gen12

 drivers/gpu/drm/i915/gt/intel_gt_types.h |   4 +
 drivers/gpu/drm/i915/gt/intel_mocs.c     | 197 ++++++++++++++++++++---
 drivers/gpu/drm/i915/gt/selftest_mocs.c  |  49 ++++++
 drivers/gpu/drm/i915/i915_reg.h          |  23 +++
 4 files changed, 254 insertions(+), 19 deletions(-)

-- 
2.26.2