[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/dp: pass crtc_state to intel_ddi_dp_level()
Patchwork
patchwork at emeril.freedesktop.org
Fri Aug 13 12:57:19 UTC 2021
== Series Details ==
Series: series starting with [1/3] drm/i915/dp: pass crtc_state to intel_ddi_dp_level()
URL : https://patchwork.freedesktop.org/series/93673/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
5fc36b81b2d1 drm/i915/dp: pass crtc_state to intel_ddi_dp_level()
e6f596ec68d1 drm/i915/dg2: use existing mechanisms for SNPS PHY translations
-:205: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#205: FILE: drivers/gpu/drm/i915/display/intel_snps_phy.c:72:
+ val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_MAIN, ddi_translations->entries[level].snps.snps_vswing);
-:206: WARNING:LONG_LINE: line length of 113 exceeds 100 columns
#206: FILE: drivers/gpu/drm/i915/display/intel_snps_phy.c:73:
+ val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_PRE, ddi_translations->entries[level].snps.snps_pre_cursor);
-:207: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#207: FILE: drivers/gpu/drm/i915/display/intel_snps_phy.c:74:
+ val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_POST, ddi_translations->entries[level].snps.snps_post_cursor);
total: 0 errors, 3 warnings, 0 checks, 181 lines checked
543840eff86e drm/i915/dg2: add SNPS PHY translations for UHBR link rates
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