[Intel-gfx] [PATCH v2] drm/i915/dp: Use max params for panels < eDP 1.4
Kai-Heng Feng
kai.heng.feng at canonical.com
Wed Aug 18 17:14:55 UTC 2021
Users reported that after commit 2bbd6dba84d4 ("drm/i915: Try to use
fast+narrow link on eDP again and fall back to the old max strategy on
failure"), the screen starts to have wobbly effect.
Commit a5c936add6a2 ("drm/i915/dp: Use slow and wide link training for
everything") doesn't help either, that means the affected eDP 1.2 panels
only work with max params.
So use max params for panels < eDP 1.4 as Windows does to solve the
issue.
v2:
- Check eDP 1.4 instead of DPCD 1.1 to apply max params
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3714
Fixes: 2bbd6dba84d4 ("drm/i915: Try to use fast+narrow link on eDP again and fall back to the old max strategy on failure")
Fixes: a5c936add6a2 ("drm/i915/dp: Use slow and wide link training for everything")
Suggested-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Kai-Heng Feng <kai.heng.feng at canonical.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 75d4ebc669411..f87fad78f1a9f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1330,14 +1330,16 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
limits.max_bpp = intel_dp_max_bpp(intel_dp, pipe_config);
- if (intel_dp->use_max_params) {
+ if (intel_dp->use_max_params ||
+ intel_dp->edp_dpcd[0] < DP_EDP_14) {
/*
* Use the maximum clock and number of lanes the eDP panel
* advertizes being capable of in case the initial fast
- * optimal params failed us. The panels are generally
- * designed to support only a single clock and lane
- * configuration, and typically on older panels these
- * values correspond to the native resolution of the panel.
+ * optimal params failed us or the EDP rev is earlier than 1.4.
+ * The panels are generally designed to support only a single
+ * clock and lane configuration, and typically on older panels
+ * these values correspond to the native resolution of the
+ * panel.
*/
limits.min_lane_count = limits.max_lane_count;
limits.min_clock = limits.max_clock;
--
2.32.0
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