[Intel-gfx] [PATCH 2/2] drm/i915: Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelisting

[Matt Atwood]

On Fri, Nov 19, 2021 at 06:09:31AM -0800, José Roberto de Souza wrote:
> Those two workarounds needs to be implemented in UMD, KMD only needs
> to whitelist the registers, so here only adding the workaround number
> to facilitate future workaroud table checks.
> 
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood at intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index cd2935b9e7c81..c3211325c2d3e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1869,7 +1869,11 @@ static void tgl_whitelist_build(struct intel_engine_cs *engine)
>  				  RING_FORCE_TO_NONPRIV_ACCESS_RD |
>  				  RING_FORCE_TO_NONPRIV_RANGE_4);
>  
> -		/* Wa_1808121037:tgl */
> +		/*
> +		 * Wa_1808121037:tgl
> +		 * Wa_14012131227:dg1
> +		 * Wa_1508744258:tgl,rkl,dg1,adl-s,adl-p
> +		 */
>  		whitelist_reg(w, GEN7_COMMON_SLICE_CHICKEN1);
>  
>  		/* Wa_1806527549:tgl */
> -- 
> 2.33.1
>